ics8745b-21 Integrated Device Technology, ics8745b-21 Datasheet
ics8745b-21
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ics8745b-21 Summary of contents
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... DIFFERENTIAL-TO-LVDS ZERO DELAY CLOCK GENERATOR Description The ICS8745B- highly versatile 1:1 LVDS ICS Clock Generator and a member of the HiPerClockS™ f family of High Performance Clock Solutions from HiPerClockS™ IDT. The ICS8745B-21 has a fully integrated PLL and can be configured as zero delay buffer, multiplier or divider, and has an output frequency range of 31 ...
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... ICS8745B-21 1:1 DIFFERENTIAL-TO-LVDS ZERO DELAY CLOCK GENERATOR Table 1. Pin Descriptions Number Name 1 CLK Input 2 CLK Input 3 MR Input 4 FBIN Input 5 FBIN Input 6, 15, SEL2, SEL3, Input 19, 20 SEL0 SEL1 Power DDO 8, 9 QFB/QFB Output 10, 14 GND Power 12, 13 Q/Q Output 16 V Power ...
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... ICS8745B-21 1:1 DIFFERENTIAL-TO-LVDS ZERO DELAY CLOCK GENERATOR Function Tables Table 3A. Control Input Function Table SEL3 SEL2 SEL1 *NOTE: VCO frequency range for all configurations above is 250MHz to 700MHz. ...
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... ICS8745B-21 1:1 DIFFERENTIAL-TO-LVDS ZERO DELAY CLOCK GENERATOR Table 3B. PLL Bypass Function Table Inputs SEL3 SEL2 SEL1 IDT™ / ICS™ LVDS ZERO DELAY CLOCK GENERATOR ...
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... ICS8745B-21 1:1 DIFFERENTIAL-TO-LVDS ZERO DELAY CLOCK GENERATOR Absolute Maximum Ratings NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability ...
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... ICS8745B-21 1:1 DIFFERENTIAL-TO-LVDS ZERO DELAY CLOCK GENERATOR Table 4C. Differential DC Characteristics, V Symbol Parameter I Input High Current IH I Input Low Current IL V Peak-to-Peak Voltage PP V Common Mode Input Voltage; NOTE 1, 2 CMR NOTE 1: Common mode input voltage is defined as V NOTE 2: For single-ended applications, the maximum input voltage for CLK, CLK is V Table 4D ...
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... ICS8745B-21 1:1 DIFFERENTIAL-TO-LVDS ZERO DELAY CLOCK GENERATOR AC Electrical Characteristics Table 6. AC Characteristics Parameter Symbol f Output Frequency MAX t Propagation Delay; NOTE 1 PD tsk(Ø) Static Phase Offset; NOTE 2, 5 tsk(o) Output Skew; NOTE 3, 5 tjit(cc) Cycle-to-Cycle Jitter; NOTE 5, 6 tjit(θ) Phase Jitter ...
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... ICS8745B-21 1:1 DIFFERENTIAL-TO-LVDS ZERO DELAY CLOCK GENERATOR Parameter Measurement Information V DD, 3.3V±5% POWER SUPPLY V DDA, LVDS + Float GND – V DDO 3.3V LVDS Output Load AC Test Circuit CLK CLK FB_IN FB_IN t(Ø) tjit(Ø) = ⏐ t(Ø) – t(Ø) mean⏐ = Phase Jitter t(Ø) ...
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... ICS8745B-21 1:1 DIFFERENTIAL-TO-LVDS ZERO DELAY CLOCK GENERATOR Parameter Measurement Information, continued PERIOD t PW odc = t PERIOD Output Duty Cycle V DD LVDS DC Input Offset Voltage Setup IDT™ / ICS™ LVDS ZERO DELAY CLOCK GENERATOR CLK CLK x 100% Propagation Delay out ...
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... DIFFERENTIAL-TO-LVDS ZERO DELAY CLOCK GENERATOR Application Information Power Supply Filtering Technique As in any high speed analog circuitry, the power supply pins are vulnerable to random noise. The ICS8745B-21 provides separate power supplies to isolate any high switching noise from the outputs to the internal PLL ...
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... ICS8745B-21 1:1 DIFFERENTIAL-TO-LVDS ZERO DELAY CLOCK GENERATOR Differential Clock Input Interface The CLK /CLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL and other differential signals. Both signals must meet the V V input requirements. Figures show interface CMR examples for the HiPerClockS CLK/CLK input driven by the most common driver types ...
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... ICS8745B-21 1:1 DIFFERENTIAL-TO-LVDS ZERO DELAY CLOCK GENERATOR Recommendations for Unused Input and Output Pins Inputs: LVCMOS Control Pins: All control pins have internal pull-ups or pull-downs; additional resistance is not required but can be added for additional protection. A 1kΩ resistor can be used. CLK/CLK I ...
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... ICS8745B-21 1:1 DIFFERENTIAL-TO-LVDS ZERO DELAY CLOCK GENERATOR Schematic Example The schematic of the ICS8745B-21 layout example is shown in Figure 5A. The ICS8745B-21 recommended PCB board layout for this example is shown in Figure 5B. This layout example is used as 3.3V (155.52 MHz Ohm Ohm 3.3V PECL Driver SP = Space (i.e. not intstalled) ...
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... U1 I CS8745B Figure 5B. PCB Board Layout for ICS8745B-21 IDT™ / ICS™ LVDS ZERO DELAY CLOCK GENERATOR and the component location. While routing the traces, the clock signal traces should be routed first and should be locked prior to routing other signal traces. • ...
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... Equations and example calculations are also provided. 1. Power Dissipation. The total power dissipation for the ICS8745B-21 is the sum of the core power plus the analog power plus the power dissipated in the load(s). The following is the power dissipation for V NOTE: Please refer to Section 3 for details on calculating power dissipated in the load. ...
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... Multi-Layer PCB, JEDEC Standard Test Boards NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs. Transistor Count The transistor count for ICS8745B-21 is: 2772 Package Outline and Package Dimension Package Outline - M Suffix for 20 Lead SOIC Reference Document: JEDEC Publication 95, MS-013, MS-119 IDT™ ...
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... ICS8745B-21 1:1 DIFFERENTIAL-TO-LVDS ZERO DELAY CLOCK GENERATOR Ordering Information Table 10. Ordering Information Part/Order Number Marking 8745BM-21 ICS8745BM-21 8745BM-21T ICS8745BM-21 8745BM-21LF TBD 8745BM-21LFT TBD NOTE: Parts that are ordered with an "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. ...
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... ICS8745B-21 1:1 DIFFERENTIAL-TO-LVDS ZERO DELAY CLOCK GENERATOR Revision History Sheet Rev Table Page T4D 5 LVDS DC Characteristics Table - modified VOS 0.90V min. to 1.05V min, B 1.15V typical to 1.2V typical, and 1.4V max. to 1.35V max. 1 Added Lead-Free bullet Ordering Information Table - added Lead-Free part and note. ...
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... ICS8745B-21 1:1 DIFFERENTIAL-TO-LVDS ZERO DELAY CLOCK GENERATOR Innovate with IDT and accelerate your future networks. Contact: www. IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. 6024 Silver Creek Valley Road San Jose, CA 95138 United States 800 345 7015 +408 284 8200 (outside U.S.) © ...