mt45w4mw16bcgb Micron Semiconductor Products, mt45w4mw16bcgb Datasheet - Page 60

• Manufacturer Part Number: mt45w4mw16bcgb
• Description: 64mb 4 Meg X 16 Async/page/burst Cellularram 1.5 Memory
• Manufacturer: Micron Semiconductor Products

Figure 47:
PDF: 09005aef8247bd51/Source: 09005aef8247bd83
64mb_burst_cr1_5_p25z_133mhz__2.fm - Rev. F 9/07 EN
2nd cycle READ
2nd cycle READ
2nd cycle READ
DQ[15:0] OUT
LB#/UB#
A[21:0]
ADV#
WAIT
WE#
OE#
CLK
CE#
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
Burst READ Interrupted by Burst READ or WRITE
IH
IH
IL
IL
IH
IL
IH
IL
IH
IL
OH
OL
IH
IL
IH
IL
OH
Notes:
t HD
t CSP
t SP
t SP
t SP t HD
address
Valid
t HD
1. Nondefault BCR settings for burst READ interrupted by burst READ or WRITE: fixed or vari-
2. Burst interrupt shown on first allowable clock (such as after the first data received by the
able latency; latency code 2 (3 clocks); WAIT active LOW; WAIT asserted during delay. All
bursts shown for variable latency; no refresh collision.
controller).
High-Z
64Mb: 4 Meg x 16 Async/Page/Burst CellularRAM 1.5 Memory
t ACLK
t BOE
t CLK
output
2nd cycle WRITE
2nd cycle WRITE
2nd cycle WRITE
Valid
t KOH
DQ[15:0] IN
t CEW
LB#/UB#
t HD
t SP
t SP
t SP t HD
address
Valid
OE#
t KHTL
t HD
t OHZ
60
V
t CEM (Note 3)
V
V
V
V
V
IH
IL
IH
IL
IH
IL
READ burst interrupted with new READ or WRITE. See Note 2.
High-Z
High-Z
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t BOE
output
Valid
t SP
D0
t KOH
t ACLK
t HD
output
Valid
D1
Don’t Care
©2005 Micron Technology, Inc. All rights reserved.
output
Valid
D2
Timing Diagrams
output
Valid
D3
t HD
t OHZ
Undefined
High-Z