mt47h256m8thn-3 Micron Semiconductor Products, mt47h256m8thn-3 Datasheet - Page 9

• Manufacturer Part Number: mt47h256m8thn-3
• Description: 2gb X4, X8 Twindie Ddr2 Sdram Functionality
• Manufacturer: Micron Semiconductor Products

I
Table 7:
PDF: 09005aef8266acfe/Source: 09005aef8266ac6e
MT47H512M4_32M_16M_twindie.fm - Rev. B 1/08 EN
Parameter/Condition
Operating one bank active-precharge
current:
t
between valid commands; Address bus inputs are
switching; Data bus inputs are switching (inactive
die is in I
switching)
Operating one bank active-read-precharge
current: I
CL = CL (I
t
t
between valid commands; Address bus inputs are
switching; Data pattern is the same as I
(inactive die is in I
switching)
Precharge power-down current: All banks idle;
t
address bus inputs are stable; Data bus inputs are
floating
Precharge quiet standby current: All banks
idle;
Other control and address bus inputs are stable;
Data bus inputs are floating
Precharge standby current: All banks idle;
t
control and address bus inputs are switching; Data
bus inputs are switching (inactive die is in I
condition, but with inputs switching)
Active power-down current: All banks open;
t
address bus inputs are stable; Data bus inputs are
floating (individual die status:
I
Active standby current: All banks open;
t
(I
commands; Other control and address bus inputs
are switching; Data bus inputs are switching
(inactive die is in I
switching)
Operating burst write current: All banks open;
Continuous burst writes; BL = 4, CL = CL (I
AL = 0;
t
valid commands; Address bus inputs are switching;
Data bus inputs are switching (inactive die is in
I
CDD
CDD
DD
RAS =
RC =
RCD =
CK =
CK =
CK =
CK =
RP =
DD
2P condition, but with inputs switching)
); CKE is HIGH, CS# is HIGH between valid
3P = I
t
CK =
t
t
t
t
t
t
Specifications and Conditions
RP (I
RC (I
CK (I
CK (I
CK (I
CK (I
t
t
t
RAS MIN (I
RCD (I
CK =
DD
DD
t
DD
OUT
CK =
DD
t
DD
2P condition, but with inputs
DD
DD
DD
DD
CK (I
), AL = 0;
3P + I
); CKE is HIGH, CS# is HIGH between
t
),
DDR2 I
Notes: 1–7 apply to the entire document; notes appear on page 10
); CKE is LOW; Other control and
); CKE is HIGH, CS# is HIGH; Other
); CKE is LOW; Other control and
),
= 0mA; Burst length (BL) = 4,
DD
CK (I
t
t
t
CK (I
RAS =
DD
RAS =
); CKE is HIGH, CS# is HIGH
DD
DD
DD
DD
); CKE is HIGH, CS# is HIGH;
DD
2P)
2P condition, but with inputs
2P condition, but with inputs
DD
); CKE is HIGH, CS# is HIGH
t
),
CK =
CDD
t
t
),
RAS MIN (I
t
RAS MAX (I
RAS =
t
RC =
Specifications and Conditions
t
CK (I
t
t
RAS MAX (I
RC (I
DD
DD
),
DD
DD
),
),
),
DD
t
RP =
DD
4W
DD
DD
),
),
t
2P
RP
Combined
Symbol
I
I
I
I
I
I
CDD
CDD
CDD
CDD
I
I
CDD
CDD
CDD
CDD
4W
2Q
2N
3N
2P
3P
0
1
9
I
I
DD
DD
I
I
I
DD
DD
DD
I
Slow PDN exit
I
Fast PDN exit
DD
DD
Die Status
2N + I
3N + I
Individual
MR[12] = 0
MR[12] = 1
4W + I
0 + I
1 + I
I
I
I
I
I
CDD
CDD
2Q + I
CDD
CDD
Micron Technology, Inc., reserves the right to change products or specifications without notice.
I
I
CDD
2P + I
CDD
CDD
DD
DD
4W =
5
2Q =
2N =
3N =
2P =
DD
DD
0 =
1 =
DD
2Gb: x4, x8 TwinDie DDR2 SDRAM
DD
2P + 5
2P + 5
DD
2P + 5
2P + 5
2P +
2P
2P
Width
x4, x8
x4, x8
x4, x8
x4, x8
x4, x8
x4, x8
x4, x8
x4, x8
Bus
x4
x8
Electrical Specifications
©2006 Micron Technology, Inc. All rights reserved
-25E
-25/
102
122
157
172
14
57
62
47
17
72
112
122
147
97
14
47
52
37
17
67
-3
-37E Units
107
132
137
82
14
47
52
37
17
57
mA
mA
mA
mA
mA
mA
mA
mA
mA