s908ey8ad4cfjer Freescale Semiconductor, Inc, s908ey8ad4cfjer Datasheet - Page 227

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s908ey8ad4cfjer

Manufacturer Part Number
s908ey8ad4cfjer
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
By updating a break address and clearing the BRKA bit in a break interrupt routine, a break interrupt can
be generated continuously.
19.2.1.1 Flag Protection During Break Interrupts
The system integration module (SIM) controls whether or not module status bits can be cleared during
the break state. The BCFE bit in the break flag control register (SBFCR) enables software to clear status
bits during the break state. See
subsection for each module.
19.2.1.2 TIM During Break Interrupts
A break interrupt stops the timer counter.
19.2.1.3 COP During Break Interrupts
The COP is disabled during a break interrupt when V
19.2.2 Break Module Registers
These registers control and monitor operation of the break module:
Freescale Semiconductor
Break status and control register (BSCR)
Break address register high (BRKH)
Break address register low (BRKL)
Break status register (SBSR)
Break flag control register (SBFCR)
ADDRESS BUS[15:0]
A break address should be placed at the address of the instruction opcode.
When software does not change the break address and clears the BRKA
bit in the first break interrupt routine, the next break interrupt will not be
generated after exiting the interrupt routine even when the internal address
bus matches the value written in the break address registers.
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
Figure 19-2. Break Module Block Diagram
ADDRESS BUS[15:8]
ADDRESS BUS[7:0]
14.7.3 SIM Break Flag Control Register
BREAK ADDRESS REGISTER HIGH
BREAK ADDRESS REGISTER LOW
8-BIT COMPARATOR
8-BIT COMPARATOR
CAUTION
TST
is present on the RST pin.
CONTROL
and the Break Interrupts
BKPT
(TO SIM)
Break Module (BRK)
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