s908gr16ag4cfj Freescale Semiconductor, Inc, s908gr16ag4cfj Datasheet - Page 207

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s908gr16ag4cfj

Manufacturer Part Number
s908gr16ag4cfj
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
16.12 I/O Registers
Three registers control and monitor SPI operation:
16.12.1 SPI Control Register
The SPI control register:
SPRIE — SPI Receiver Interrupt Enable Bit
SPMSTR — SPI Master Bit
CPOL — Clock Polarity Bit
CPHA — Clock Phase Bit
SPWOM — SPI Wired-OR Mode Bit
Freescale Semiconductor
This read/write bit enables CPU interrupt requests generated by the SPRF bit. The SPRF bit is set
when a byte transfers from the shift register to the receive data register. Reset clears the SPRIE bit.
This read/write bit selects master mode operation or slave mode operation. Reset sets the SPMSTR
bit.
This read/write bit determines the logic state of the SPSCK pin between transmissions. (See
Figure 16-5
identical CPOL values. Reset clears the CPOL bit.
This read/write bit controls the timing relationship between the serial clock and SPI data. (See
Figure 16-5
identical CPHA values. When CPHA = 0, the SS pin of the slave SPI module must be high between
bytes. (See
This read/write bit disables the pullup devices on pins SPSCK, MOSI, and MISO so that those pins
become open-drain outputs.
1 = SPRF CPU interrupt requests enabled
0 = SPRF CPU interrupt requests disabled
1 = Master mode
0 = Slave mode
1 = Wired-OR SPSCK, MOSI, and MISO pins
0 = Normal push-pull SPSCK, MOSI, and MISO pins
SPI control register (SPCR)
SPI status and control register (SPSCR)
SPI data register (SPDR)
Enables SPI module interrupt requests
Configures the SPI module as master or slave
Selects serial clock polarity and phase
Configures the SPSCK, MOSI, and MISO pins as open-drain outputs
Enables the SPI module
Address: $0010
Figure
and
and
Reset:
Read:
Write:
Figure
Figure
16-13.) Reset sets the CPHA bit.
SPRIE
Bit 7
R
0
16-7.) To transmit data between SPI modules, the SPI modules must have
16-7.) To transmit data between SPI modules, the SPI modules must have
Figure 16-14. SPI Control Register (SPCR)
= Reserved
R
6
0
MC68HC908GR16A Data Sheet, Rev. 1.0
SPMSTR
5
1
CPOL
4
0
CPHA
3
1
SPWOM
2
0
SPE
1
0
SPTIE
Bit 0
0
I/O Registers
207

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