s908qy2ad1vdwer Freescale Semiconductor, Inc, s908qy2ad1vdwer Datasheet - Page 56
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s908qy2ad1vdwer
Manufacturer Part Number
s908qy2ad1vdwer
Description
Mc68hc908qt4a Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.S908QY2AD1VDWER.pdf
(200 pages)
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Auto Wakeup Module (AWU)
COPRS (In Stop Mode) — Auto Wakeup Period Selection Bit, depends on OSCSTOPEN in
CONFIG2 and bus clock source (BUSCLKX2).
SSREC — Short Stop Recovery Bit
56
SSREC enables the CPU to exit stop mode with a delay of 32 BUSCLKX4 cycles instead of a 4096
BUSCLKX4 cycle delay.
1 = Auto wakeup short cycle = 512 × (INTRCOSC or BUSCLKX2)
0 = Auto wakeup long cycle = 16,384 × (INTRCOSC or BUSCLKX2)
1 = Stop mode recovery after 32 BUSCLKX4 cycles
0 = Stop mode recovery after 4096 BUSCLKX4 cycles
LVISTOP, LVIRST, LVIPWRD, LVITRIP, and COPD bits are not used in
conjuction with the auto wakeup feature. To see a description of these bits,
see
Chapter 5 Configuration Register (CONFIG)
MC68HC908QYA/QTA Family Data Sheet, Rev. 2
NOTE
Freescale Semiconductor
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