s908qy2ad1vdwer Freescale Semiconductor, Inc, s908qy2ad1vdwer Datasheet - Page 55

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s908qy2ad1vdwer

Manufacturer Part Number
s908qy2ad1vdwer
Description
Mc68hc908qt4a Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
AWUIE — Auto Wakeup Interrupt Enable Bit
4.6.4 Configuration Register 2
The configuration register 2 (CONFIG2), is used to allow the bus clock source to run in STOP. In this case,
the clock, BUSCLKX2 will be used to drive the AWU request generator.
OSCENINSTOP — Oscillator Enable in Stop Mode Bit
4.6.5 Configuration Register 1
The configuration register 1 (CONFIG1), is used to select the period for the AWU. The timeout will be
based on the COPRS bit along with the clock source for the AWU.
Freescale Semiconductor
This read/write bit enables the auto wakeup interrupt input to latch interrupt requests. Reset clears
AWUIE.
OSCENINSTOP, when set, will allow the bus clock source (BUSCLKX2) to generate clocks for the
AWU in stop mode. See
external clock sources.
1 = Auto wakeup enabled as interrupt input
0 = Auto wakeup not enabled as interrupt input
1 = Oscillator enabled to operate during stop mode
0 = Oscillator disabled during stop mode
Reset:
Read:
Write:
Reset: POR:
KBIE5–KBIE0 bits are not used in conjuction with the auto wakeup feature.
To see a description of these bits, see
Register
IRQPUD, IRQEN, and RSTEN bits are not used in conjuction with the auto
wakeup feature. To see a description of these bits, see
Configuration Register
Read:
Write:
IRQPUD
Bit 7
0
U = Unaffected
COPRS
(KBIER).
Bit 7
0
0
Figure 4-5. Configuration Register 2 (CONFIG2)
Figure 4-6. Configuration Register 1 (CONFIG1)
IRQEN
11.8.1 Oscillator Status and Control Register
6
0
MC68HC908QYA/QTA Family Data Sheet, Rev. 2
LVISTOP
6
0
0
R
(CONFIG).
5
0
LVIRSTD
5
0
0
R
4
0
NOTE
NOTE
LVIPWRD
4
0
0
9.8.2 Keyboard Interrupt Enable
R
3
0
LVITRIP
U
3
0
R
2
0
SSREC
2
0
0
Chapter 5
OSCENINSTOP
for information on enabling the
STOP
1
0
1
0
0
COPD
RSTEN
Bit 0
Bit 0
0
0
0
Registers
55

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