s29gl01gs Meet Spansion Inc., s29gl01gs Datasheet - Page 27

• Manufacturer Part Number: s29gl01gs
• Manufacturer: Meet Spansion Inc.

D a t a
S h e e t
( P r e l i m i n a r y )
Write Buffer Programming allows up to 512-bytes to be programmed in one operation. It is possible to
program from 1 bit up to 512-bytes in each Write Buffer Programming operation. It is recommended that a
multiple of Pages be written and each Page written only once. For the very best performance, programming
should be done in full Lines of 512-bytes aligned on 512-byte boundaries.
Write Buffer Programming is supported only in the main flash array or the SSR ASO.
The Write Buffer Programming operation is initiated by first writing two unlock cycles. This is followed by a
third write cycle of the Write to Buffer command with the Sector Address (SA), in which programming is to
occur. Next, the system writes the number of word locations minus 1. This tells the device how many write
buffer addresses are loaded with data and therefore when to expect the Program Buffer to flash confirm
command. The Sector Address must match in the Write to Buffer command and the Write Word Count
command. The Sector to be programmed must be unlocked (unprotected).
The system then writes the starting address / data combination. This starting address is the first address /
data pair to be programmed, and selects the write-buffer-Line address. The Sector address must match the
Write to Buffer Sector Address or the operation will abort and return to the initiating state. All subsequent
address / data pairs must be in sequential order. All write buffer addresses must be within the same Line. If
the system attempts to load data outside this range, the operation will abort and return to the initiating state.
The counter decrements for each data load operation. Note that while counting down the data writes, every
write is considered to be data being loaded into the write buffer. No commands are possible during the write
buffer loading period. The only way to stop loading the write buffer is to write with an address that is outside
the Line of the programming operation. This invalid address will immediately abort the Write to Buffer
command.
Once the specified number of write buffer locations has been loaded, the system must then write the Program
Buffer to Flash command at the Sector Address. The device then goes busy. The Embedded Program
algorithm automatically programs and verifies the data for the correct data pattern. The system is not required
to provide any controls or timings during these operations. If an incorrect number of write buffer locations
have been loaded the operation will abort and return to the initiating state. The abort occurs when anything
other than the Program Buffer to Flash is written when that command is expected at the end of the word
count.
The write-buffer embedded programming operation can be suspended using the Program Suspend
command. When the Embedded Program algorithm is complete, the EAC then returns to the EAC standby or
Erase Suspend standby state where the programming operation was started.
The system can determine the status of the program operation by using Data Polling Status, reading the
Status Register, or monitoring the RY/BY# output. See
Status Register on page 36
for information on these
status bits. See
Data Polling Status on page 37
for information on these status bits. See
Figure 5.2
on page 28
for a diagram of the programming operation.
The Write Buffer Programming Sequence will be Aborted under the following conditions:
 Load a Word Count value greater than the buffer size (255).
 Write an address that is outside the Line provided in the Write to Buffer command.
 The Program Buffer to Flash command is not issued after the Write Word Count number of data words is
loaded.
When any of the conditions that cause an abort of write buffer command occur the abort will happen
immediately after the offending condition, and will indicate a Program Fail in the Status Register at bit location
4 (PSB = 1) due to Write Buffer Abort bit location 3 (WBASB = 1). The next successful program operation will
clear the failure status or a Clear Status Register may be issued to clear the PSB status bit.
The Write Buffer Programming Sequence can be stopped by the following: Hardware Reset or Power cycle.
However, these using either of these methods may leave the area being programmed in an intermediate state
with invalid or unstable data values. In this case the same area will need to be reprogrammed with the same
data or erased to ensure data values are properly programmed or erased.
®
March 21, 2011 S29GL_128S_01GS_00_02
GL-S MirrorBit
Family
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