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... GL-S MirrorBit Non-Volatile Memory Family S29GL01GS 1 Gbit S29GL512S 512 Mbit S29GL256S 256 Mbit S29GL128S 128 Mbit CMOS 3.0 Volt Core with Versatile I/O Data Sheet (Preliminary) Notice to Readers: This document states the current technical specifications regarding the Spansion product(s) described herein. Each product described herein may be designated as Advance Information, Preliminary, or Full Production ...
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Notice On Data Sheet Designations Spansion Inc. issues data sheets with Advance Information or Preliminary designations to advise readers of product information or intended specifications throughout the product life cycle, including development, qualification, initial production, and full production. In all ...
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... GL-S MirrorBit Non-Volatile Memory Family S29GL01GS 1 Gbit S29GL512S 512 Mbit S29GL256S 256 Mbit S29GL128S 128 Mbit CMOS 3.0 Volt Core with Versatile I/O Data Sheet (Preliminary) General Description ® The Spansion S29GL01G/512/256/128S are MirrorBit Eclipse flash products fabricated process technology. These devices offer a fast page access time as fast with a corresponding random access time as fast as 90 ns. They feature a Write Buffer that allows a maximum of 256 words/512 bytes to be programmed in one operation, resulting in faster effective programming time than standard programming algorithms. This makes these devices ideal for today’ ...
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Performance Summary Density 128 Mb 256 Mb 512 Buffer Programming (512 bytes) Sector Erase (128 kbytes) Active Read at 5 MHz ...
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Table of Contents General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Power-On Reset (POR) and Warm Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Figures Figure 1.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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... Tables Table 1.1 S29GL-S Address Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 2.1 S29GL01GS Sector and Memory Address Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 2.2 S29GL512S Sector and Memory Address Map Table 2.3 S29GL256S Sector and Memory Address Map Table 2.4 S29GL128S Sector and Memory Address Map Table 2.5 ID-CFI Address Map Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Table 2.6 Secure Silicon Region . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 3 ...
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Product Overview The GL-S family consists of 128-Mbit to 1Gbit, 3.0V core, Versatile I/O, non-volatile, flash memory devices. These devices have a 16-bit (word) wide data bus and use only word boundary addresses. All read ...
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Address within Page Address within Write Buffer Page Write-Buffer-Line Sector The device control logic is subdivided into two parallel operating sections, the Host Interface Controller (HIC) and the Embedded Algorithm Controller (EAC). HIC monitors signal levels on the device inputs ...
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Software Interface 2. Address Space Maps There are several separate address spaces that may appear within the address range of the flash memory device. One address space is visible (entered) at any given time. Flash ...
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... Sector Size (kbyte) 128 Sector Size (kbyte) 128 Table 2.1 S29GL01GS Sector and Memory Address Map Sector Count Sector Range SA00 1024 : SA1023 Table 2.2 S29GL512S Sector and Memory Address Map Sector Count ...
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Sector Size (kbyte) 128 Note: These tables have been condensed to show sector related information for an entire device on a single page Sectors and their address ranges that are not explicitly listed (such as SA001-SA510) ...
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The original industry format was structured to work with any memory data bus width e. g. x8, x16, x32. The ID code values are traditionally byte wide but are located at bus width address boundaries such that incrementing the device ...
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All PPB Erase The Data Polling Status word appears at all word locations in the device address space. When completed the Data Polling Status ASO is exited and the device address space ...
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Dynamic Protection Bits (DYB) ASO The DYB ASO contains one bit of a volatile memory array for each Sector in the device. When the DYB ASO is entered, the DYB bit for a sector appears in the Least Significant ...
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Data Protection The device offers several features to prevent malicious or accidental erasure of any sector via hardware means. 3.1 Device Protection Methods 3.1.1 Power-Up Write Inhibit RESET#, CE#, WE#, and, OE# are ignored during ...
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Sector Protection Methods 3.4.1 Write Protect Signal If WP the lowest or highest address sector is protected from program or erase operations independent IL of any other ASP configuration. Whether it is the lowest or highest ...
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There is no command in the Persistent Protection method to set the PPB Lock bit therefore the PPB Lock bit will remain at 0 until the next power-off or hardware reset. The Persistent Protection method allows ...
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Sector Protection States Summary Each sector can be in one of the following protection states: Unlocked – The sector is unprotected and protection can be changed by a simple command. The protection state defaults to unprotected after a ...
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both lock bits are selected to be programmed at the same time, the operation will abort. Once the Password Mode Lock Bit is programmed, the Persistent Mode Lock Bit is permanently disabled and no changes ...
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The Password Unlock command cannot be accepted any faster than once every 100 µs ± 20 µs. This makes it take an unreasonably long time (58 million years) for a hacker to run through all the 64-bit combinations in ...
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Read Operations 4.1 Asynchronous Read Each read access may be made to any location in the memory (random access). Each random access is self- timed with the same latency from CE# or address to valid ...
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Embedded Operations 5.1 Embedded Algorithm Controller (EAC) The EAC takes commands from the host system for programming and erasing the flash memory array and performs all the complex operations needed to change the non-volatile memory state. This frees the ...
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A program operation may be suspended to allow reading of another location (not in the Line being programmed). No other program or erase operation may be started during a suspended program operation - program ...
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Command Set 5.3.1 Program Methods 5.3.1.1 Word Programming Word programming is used to program a single word anywhere in the main Flash Memory Array. The Word Programming command is a four-write-cycle sequence. The program command sequence is initiated by ...
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Write Buffer Programming allows up to 512-bytes to be programmed in one operation possible to program from 1 bit up to 512-bytes in each Write Buffer Programming operation recommended that a multiple ...
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Figure 5.2 Write Buffer Programming Operation with Data Polling Status Notes: 1. DQ7 should be rechecked even if DQ5 = 1 because DQ7 may change simultaneously with DQ5 this flowchart location was reached because DQ5 = 1, then ...
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Figure 5.3 Write Buffer Programming Operation with Status Register Program aborted during Write to Buffer command Notes: 1. See Table 6.1, Command Definitions on page 54 2. When Sector Address is specified, any address in the ...
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Sequence Issue Unlock Command 1 Issue Unlock Command 2 Issue Write to Buffer Command at Sector Address Issue Number of Locations at Sector Address Example words to pgm words to ...
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Program operations can be interrupted as often as necessary but in order for a program operation to progress to completion there must be some periods of time between resume and the next suspend command greater than ...
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The system can determine the status of the erase operation by reading the Status Register or using Data Polling. Refer to Status Register on page 36 on page 37 for more information. Once the sector erase operation has begun, the ...
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5.3.5 Erase Suspend / Erase Resume The Erase Suspend command allows the system to interrupt a sector erase operation and then read data from, or program data to, the main flash array. This command is valid ...
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ASO Exit. The following source code example of using the CFI Entry and Exit functions. Refer to the Spansion Low Level Driver User's Guide (available on www.spansion.com) for general information on Spansion flash memory software development ...
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5.3.6.6 PPB ASO The system can access the PPB ASO by issuing the PPB entry command sequence during Read Mode. This entry command does not use a sector address from the entry command. The PPB bit ...
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Status Monitoring There are three methods for monitoring EA status. Previous generations of the S29GL flash family used the methods called Data Polling and Ready/Busy# (RY/BY#) Signal. These methods are still supported by the S29GL-S family. One additional method ...
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Bit # 15:8 Bit Reserved Description Bit Name Reset X Status Busy Status Invalid Ready X Status Notes: 1. Bits 15 thru 8, and 0 are reserved for future use and may display ...
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During the Embedded Erase or blank check algorithms, Data# Polling produces DQ7. When the algorithm is complete the device enters the Erase Suspend mode, Data# Polling produces a '1' on DQ7. This is analogous to ...
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toggles. When the device enters the Program Suspend mode or Erase Suspend mode, DQ6 stops toggling. However, the system must also use DQ2 to determine which sectors are erasing, or erase-suspended. Alternatively, the system can use ...
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Notes: 1. Read toggle bit twice to determine whether or not it is toggling. See text. 2. Recheck toggle bit because it may stop toggling as DQ5 changes to 1. See text. 5.4.2.6 DQ5: Exceeded Timing Limits DQ5 indicates whether ...
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5.4.2.7 DQ1: Write-to-Buffer Abort DQ1 indicates whether a Write-to-Buffer operation was aborted. Under these conditions DQ1 produces a '1'. The system must issue the Write-to-Buffer-Abort-Reset command sequence to return the EAC to standby (read mode) and ...
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DQ4 is RFU and should be treated as don’t care (masked) DQ3 = 1 to indicate embedded sector erase in progress DQ2 continues to toggle, independent of the address used to read status DQ1 = 1; ...
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After the protection error status busy period the Status Register will show the following: SR[ Valid status displayed SR[ May or may not be erase suspended after the protection error ...
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Reads the status register and returns to WBA busy state Write Buffer Abort Reset command Status Register Clear command 5.6 Embedded Algorithm Performance Table Parameter Sector Erase Time 128 kbyte Single Word Programming Time Buffer Programming Time ...
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5.6.1 Command State Transitions Command Current State Read and Condition Address RA Data RD - READ READ Read Protect = False READSR - (return) Table 5.6 Read Unlock Command State Transition Status Command Current Register Unlock ...
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Table 5.8 Erase Suspend State Command Transition Command and Current State Condition Address Data ESR (1) - SR( SR( ESSR - Note: 1. State will automatically move to ES state by t ESL Table 5.9 ...
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Table 5.11 Erase Suspend - Program Command State Transition Current State Command Read and Condition Address RA Data RD WC > 256 or SA ≠ SA ES_WB ES_WB WC ≤ 256 and ...
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Command Current and Read Reset / ASO State Condition Address RA Data RD WC > 256 or SA ≠ ≤ 256 and Write Buffer ≠ Write Buffer WB_D WB_D WC ...
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Table 5.16 Lock Register State Command Transition Command Current State and Read Condition Address RA Data LRPG1 - LRPG1 LRPG - LRPG LRSR - (return) LREXT - LREXT Command and Current State ...
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Table 5.20 Secure Silicon Sector Program State Command Transition Command and Current State Condition Address Data SSRPG1 - WC > 256 or SA ≠ SA SSR_WB WC ≤ 256 and < Write Buffer ≠ ...
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Table 5.22 Non-Volatile Protection Command State Transition Command Software Current and Read Reset / State Condition ASO Exit Address RA xh Data RD 00F0h PPB - PPB READ PPBPG1 - PPBPG1 READ SR( ...
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Current State Command Transition BLCK Table 5.7 CER Table 5.7 CFI Table 5.17 CFISR Table 5.17 DYB Table 5.24 DYBEXT Table 5.24 DYBSET Table 5.24 DYBSR Table 5.24 ER Table 5.7 ERSR Table 5.7 ERUL1 Table 5.7 ERUL2 Table 5.7 ...
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Current State Command Transition PPBPG1 Table 5.22 PPBSR Table 5.22 PPD Table 5.21 PPEXT Table 5.21 PPPG Table 5.21 PPPG1 Table 5.21 PPSR Table 5.21 PS Table 5.15 PSR Table 5.15 PSSR Table 5.15 PPWB25 Table ...
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Software Interface Reference 6.1 Command Summary Command Sequence First (Note 1) Addr Data Read (Note Reset/ASO Exit (Notes 7, 16) 1 XXX Status Register Read 2 555 Status Register Clear 1 555 Word Program 4 555 ...
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Command Sequence First (Note 1) Addr Data Lock Register Entry 3 555 AA Program (Note 15) 2 XXX A0 Read (Note 15 Command Set Exit 2 XXX 90 (Notes 12, 16) Reset/ASO Exit ...
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Command Sequence First (Note 1) Addr Data DYB ASO Entry 3 555 DYB Set (Note 17) 2 XXX DYB Clear (Note 17) 2 XXX DYB Status Read (0) (Note 17) Command Set Exit 2 XXX (Notes 12, ...
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ID-CFI Location 02h displays sector protection status for the sector selected by the sector address (SA) used in the ID-CFI enter command. To read the protection status of more than one sector it is necessary to ...
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Word Address (SA) + 0010h (SA) + 0011h (SA) + 0012h (SA) + 0013h (SA) + 0014h (SA) + 0015h (SA) + 0016h (SA) + 0017h (SA) + 0018h (SA) + 0019h (SA) + 001Ah Word Address (SA) + 001Bh ...
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Word Address (SA) + 0031h (SA) + 0032h (SA) + 0033h (SA) + 0034h (SA) + 0035h (SA) + 0036h (SA) + 0037h (SA) + 0038h (SA) + 0039h (SA) + 003Ah (SA) + 003Bh (SA) ...
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Table 6.6 CFI Primary Vendor-Specific Extended Query (Sheet Word Address (SA) + 004Ch (SA) + 004Dh (SA) + 004Eh (SA) + 004Fh (SA) + 0050h (SA) +0051h (SA) + 0052h (SA) + 0053h (SA) + 0054h (SA) ...
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... Write Enable indicates data transfer from host to device transfer is from device to host. Address inputs. A25-A0 for S29GL01GS A24-A0 for S29GL512S A23-A0 for S29GL256S A22-A0 for S29GL128S Data inputs and outputs Write Protect disables program and erase functions in the lowest or highest address IL 64 kword (128 kB) sector of the device ...
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RESET#. Since RY/BY open drain output, several RY/BY# pins can be tied together in parallel with a pull up resistor the output is Low (Busy), the device is actively erasing, programming, or ...
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Signal Protocols The following sections describe the host system interface signal behavior and timing for the 29GL-S family flash devices. 8.1 Interface States Table 8.1 describes the required value of each interface signal for each ...
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Power Conservation Modes 8.3.1 Interface Standby Standby is the default, low power, state for the interface while the device is not selected by the host for data transfer (CE# = High). All inputs are ignored in this state and ...
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the Write state. If CE# returns High, the interface goes to the Standby state. Back to Back accesses, in which CE# remains Low between accesses, requires an address change to initiate the second access. See ...
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Electrical Specifications 9.1 Absolute Maximum Ratings Storage Temperature Plastic Packages Ambient Temperature with Power Applied Voltage with Respect to Ground All pins (Note 1) Output Short Circuit Current Notes: 1. Minimum DC voltage on input ...
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Symbol V V Power Supply level below which re-initialization is required LKO and V RST and V VCS CC t Duration Note: 1. ...
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Input Signal Overshoot Figure 9.3 Maximum Negative Overshoot Waveform max IL V ...
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9.4 DC Characteristics Parameter Description I Input Load Current LI I Output Leakage Current Active Read Current CC1 Intra-Page Read Current CC2 CC V Active Erase/Program CC I CC3 Current ...
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Capacitance Characteristics Parameter Symbol OUT C IN2 Notes: 1. Sampled, not 100% tested. 2. Test conditions T = 25° 1.0 MHz. A Parameter Symbol OUT C IN2 Notes: 1. Sampled, not ...
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10. Timing Specifications 10.1 Key to Switching Waveforms Waveform 10.2 AC Test Conditions Output Load Capacitance, C Input Rise and Fall Times Input Pulse Levels Input timing measurement reference levels Output timing measurement reference levels Note: ...
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Power-On Reset (POR) and Warm Reset Normal precautions must be taken for supply decoupling to stabilize the V device in a system should have the V the package connections (this capacitor is generally on the order of 0.1 µF). ...
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10.3.2 Hardware (Warm) Reset During Hardware Reset (t When RESET# continues to be held at V held but not Cold Reset has not been completed by the device ...
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AC Characteristics 10.4.1 Asynchronous Read Operations Parameter JEDEC Std t t Read Cycle Time AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV CE t Page Access Time PACC t ...
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Amax-A0 CE# OE# DQ15-DQ0 Amax-A0 CE# OE# DQ15-DQ0 Note: Back to Back operations, in which CE# remains Low between accesses, requires an address change to initiate the second access. Amax-A4 A3-A0 CE# OE# DQ15-DQ0 Note: Word ...
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Asynchronous Write Operations Parameter JEDEC Std t t AVAV AVWL AS t ASO t t WLAX AH t AHT t t DVWH WHDX DH t OEPH t t GHWL GHWL t t ELWL ...
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Amax-A0 CE# OE# WE# DQ15-DQ0 Amax-A0 CE# OE# WE# DQ15-DQ0 March 21, 2011 S29GL_128S_01GS_00_02 Figure 10.8 Back to ...
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Amax-A0 CE# OE# WE# DQ15-D0 Amax-A0 CE# OE# WE# DQ15- Figure 10.10 Write to Read (t ) ...
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Figure 10.12 Read to Write (CE# Toggle) Operation Timing Diagram Amax-A0 CE# OE# WE# DQ15-A0 Parameter JEDEC Std t t WHWH1 WHWH1 t t WHWH2 WHWH2 t BUSY t SR/W t ESL t PSL t RB ...
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Addresses CE# OE# WE# Data RY/BY# Note program address program data, D Addresses CE# OE# WE# Data RY/BY# Note sector address (for sector erase valid address for reading status data. ...
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Figure 10.15 Data# Polling Timing Diagram (During Embedded Algorithms) Addresses CE OE# t WE# DQ7 DQ6–DQ0 t BUSY RY/BY# Note Valid address. Illustration shows first status cycle after command sequence, last ...
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Alternate CE# Controlled Write Operations Parameter JEDEC Std t t AVAV AVWL AS t ASO t t WLAX AH t AHT t t DVWH WHDX DH t CEPH t 0EPH t t GHEK ...
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Amax-A0 CE# OE# WE# DQ15-D0 March 21, 2011 S29GL_128S_01GS_00_02 Figure 10.19 (CE#) Write to Read Operation Timing Diagram ...
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Physical Interface 11.1 56-Pin TSOP 11.1.1 Connection Diagram A23 NC for GL128S A22 A15 A14 A13 A12 A11 A10 A19 A20 WE# RESET# A21 WP# RY/BY# A18 A17 RFU DNU Notes: 1. Pin 28, Do Not Use (DNU), a ...
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11.1.2 Physical Diagram Figure 11.2 56-Pin Thin Small Outline Package (TSOP PACKAGE TS 56 JEDEC MO-142 (B) EC SYMBOL MIN. A --- A1 0.05 A2 0.95 b1 0.17 b 0.17 c1 0.10 ...
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FBGA 11.2.1 Connection Diagram A NC for GL128S A13 WE# 4 RY/BY Notes: 1. Ball E1, Do Not Use (DNU), a device internal signal is connected ...
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11.2.2 Physical Diagram Figure 11.4 LAE064—64-ball Fortified Ball Grid Array (FBGA PACKAGE LAE 064 JEDEC N/A 9. 9.00 mm PACKAGE SYMBOL MIN NOM A --- --- A1 0.40 --- A2 ...
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Special Handling Instructions for FBGA Package Special handling is required for Flash Memory products in FBGA packages. Flash memory devices in FBGA packages may be damaged if exposed to ultrasonic cleaning methods. The package and/or data integrity may be ...
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... The ordering part number for the General Market device is formed by a valid combination of the following: S29GL01GS 10 Device Number/Description S29GL01GS, S29GL512S, S29GL256S, S29GL128S 3.0 Volt Core, with V Manufactured MirrorBit Eclipse Process Technology Valid Combinations The Recommended Combinations table lists configurations planned to be available in volume. The table below will be updated as new combinations are released ...
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Other Resources Visit www.spansion.com 13.1 Links to Software Downloads and related information on flash device support is available at http://www.spansion.com/Support/Pages/DriversSoftware.aspx Spansion low-level drivers Enhanced flash drivers Flash file system Downloads and related information on simulation modeling ...
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13.3 Specification Bulletins Contact your local sales office for details. 13.4 Contacting Spansion Obtain the latest list of company locations and contact information on our web site at http://www.spansion.com/About/Pages/Locations.aspx March 21, 2011 S29GL_128S_01GS_00_02 ...
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Revision History Section Revision 01 (February 11, 2011) Initial release Revision 02 (March 21, 2011) Global Modified document from “Advance Information” to “Preliminary” Added FBGA package offering for V1 & V2 Model Number OPN Removed KGD information, which is ...
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Colophon The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed ...