ltc4215-1 Linear Technology Corporation, ltc4215-1 Datasheet - Page 12
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ltc4215-1
Manufacturer Part Number
ltc4215-1
Description
Hot Swap Controller With Adc And I2c Compatible Monitoring
Manufacturer
Linear Technology Corporation
Datasheet
1.LTC4215-1.pdf
(24 pages)
APPLICATIONS INFORMATION
V
LTC4215-1
The MOSFET is turned on by charging up the GATE with
a 20μA current source. When the GATE voltage reaches
the MOSFET threshold voltage, the MOSFET begins to
turn on and the SOURCE voltage then follows the GATE
voltage as it increases.
When the MOSFET is turning on, it ramps inrush current
up linearly at a dI/dt rate selected by capacitor C
the inrush current reaches the limit set by the FB pin, the
dI/dt ramp stops and the inrush current follows the fold-
back profi le as shown in Figure 2. The TIMER capacitor
integrates at 100μA during start-up and once it reaches its
threshold of 1.235V, the part checks to see if it is in current
limit, which indicates that it has started up into a short-
circuit condition. If this is the case, the overcurrent fault
bit, D2 in Table 5, is set and the part turns off. If the part
is not in current limit, the 25mV circuit breaker is armed
and the current limit is switched to 75mV. Alternately an
internal 100ms start-up timer may be selected by tying
the TIMER pin to INTV
As the SOURCE voltage rises, the FB pin follows as set by
R7 and R8. Once FB crosses its 1.235V threshold, and the
start-up timer has expired, the GPIO1 pin, if confi gured
to indicate power-good, ceases to pull low and indicates
that power is now good. Alternately bit C3 can be read
to check power-good status, where a zero indicates that
power is good.
12
DD
V
25mV
10mV
SENSE
+ 6V
V
DD
LIMITED
SS
Figure 2. Power-Up Waveforms
t
STARTUP
LIMITED
FB
CC
.
EXPIRES
TIMER
4215 F02
V
V
GPIO1
(POWER GOOD)
I
LOAD
GATE
OUT
SS
• R
. Once
SENSE
If R6 and C1 are employed for a constant current during
start-up, which produces a constant dV/dt at the output,
a 20μA pull-up current from the gate pin slews the gate
upwards and the part is not in current limit. The start-up
TIMER may expire in this condition and an overcurrent
(OC) fault is not generated even though start-up has
not completed. Either the sense voltage increases to the
25mV CB threshold and generates an OC fault, or the FB
pin voltage crosses its 1.235V power good threshold and
is indicated in bit C3 as well as the GPIO1 pin if GPIO1 is
confi gured to do so.
GATE Pin Voltage
A curve of GATE-to-SOURCE drive vs V
Typical Performance Characteristics. At minimum input
supply voltage of 2.9V, the minimum GATE-to-SOURCE
drive voltage is 5V. The GATE-to-SOURCE voltage is
clamped below 6.5V to protect the gates of logic level
N-channel MOSFETs.
Turn-Off Sequence
The GATE is turned off by a variety of conditions. A normal
turn-off is initiated by the ON pin going low or a serial bus
turn-off command. Additionally, several fault conditions
turn off the GATE. These include an input overvoltage
(OV pin), input undervoltage (UV pin), overcurrent circuit
breaker (SENSE
a logic one into the UV, OV or OC fault bits (D0-D2 in
Table 5) also latches off the GATE if their auto-retry bits
are set to false.
Normally the MOSFET is turned off with a 1mA current
pulling down the GATE pin to ground. With the MOSFET
turned off, the SOURCE and FB voltages drop as CL dis-
charges. When the FB voltage crosses below its threshold,
GPIO1 may be confi gured to pull low to indicate that the
output power is no longer good.
If the V
INTV
down of the MOSFET is initiated. The GATE pin is pulled
down with a 450mA current to the SOURCE pin.
CC
DD
drops below 2.60V for greater than 1μs, a fast shut
pin falls below 2.74V for greater than 2μs or
–
pin), or EN transitioning high. Writing
DD
is shown in the
42151f