ltc4215-1 Linear Technology Corporation, ltc4215-1 Datasheet - Page 11

• Manufacturer Part Number: ltc4215-1
• Description: Hot Swap Controller With Adc And I2c Compatible Monitoring
• Manufacturer: Linear Technology Corporation

OPERATION
(input) and SDAO (output). This simplifi es applications
using an optoisolator driven directly from the SDAO out-
put. An application which uses optoisolation is shown in
APPLICATIONS INFORMATION
A typical LTC4215-1 application is in a high availability
system in which a positive voltage supply is distributed
to power individual cards. The device measures card
voltages and currents and records past and present fault
conditions. The system queries each LTC4215-1 over
the I
information.
A basic LTC4215-1 application circuit is shown in Figure 1.
The following sections cover turn-on, turn-off and various
faults that the LTC4215-1 detects and acts upon. External
component selection is discussed in detail in the Design
Example section.
Turn-On Sequence
The power supply on a board is controlled by using an
external N-channel pass transistor (Q1) placed in the power
path. Note that resistor R
sistors R1, R2 and R3 defi ne undervoltage and overvoltage
levels. R5 prevents high frequency oscillations in Q1, and
R6 and C1 form an optional network that may be used to
provide an output dV/dt limited start-up.
2
C periodically and reads status and measurement
GND
SDA
SCL
12V
BACKPLANE
S
provides current detection. Re-
PLUG-IN
CARD
0.1μF
C
Z1*
SA14A
F
3.4K
1%
R3
R2
1.02k
1%
C
0.68μF
R1
34k
1%
TIMER
Figure 1. Typical Application
OV
ON
SDAI
SDA0
SCL
TIMER
UV V
DD
INTV
SENSE
CC
C3
0.1μF
0.005Ω
ADR0
LTC4215-1
+
RS
SENSE
Several conditions must be present before the external
MOSFET turns on. First the external supply, V
exceed its 2.84V undervoltage lockout levels. Next the
internally generated supply, INTV
undervoltage threshold. This generates a 60μs to 120μs
power-on-reset pulse. During reset the fault registers are
cleared and the control registers are set or cleared as
described in the register section.
After a power-on-reset pulse, the LTC4215-1 goes through
the following turn-on sequence. First the UV and OV
comparators indicate that input power is within the ac-
ceptable range, which is indicated by bits C0-C1 in Table 4.
Second, the EN pin is externally pulled low. Finally, all
of these conditions must be satisfi ed for the duration of
100ms to ensure that any contact bounce during insertion
has ended.
When these initial conditions are satisfi ed, the ON pin is
checked and its state written to bit A3 in Table 2. If it is
high, the external MOSFET is turned on. If the ON pin is
low, the external MOSFET is turned on when the ON pin is
brought high or if a serial bus turn-on command is sent
by setting bit A3.
the Typical Applications section. The I
is decoded using the ADR0 and ADR1 pins. These inputs
have three states each that decode into a total of 9 device
addresses.
ADR1
NC
10Ω
–
FDC653N
R5
GATE
SS
Q1
6.8nF
15k
R6
C
7.5nF
C1
SS
GND
SOURCE
GPIO3
GPIO2
GPIO1
ADIN
EN
FB
RESET
R7
30.1k
1%
R8
3.57k
1%
24k
24k
4215 F01
+
3.3V
24k
CC
C
330μF
L
, must cross its 2.64V
LTC4215-1
V
12V
2
OUT
C device address
DD
11
, must
42151f