ltc4268cdkd-1-trpbf Linear Technology Corporation, ltc4268cdkd-1-trpbf Datasheet - Page 36

• Manufacturer Part Number: ltc4268cdkd-1-trpbf
• Description: High Power Pd With Synchronous Noopto Flyback Controller
• Manufacturer: Linear Technology Corporation

APPLICATIONS INFORMATION
where R′
resistor. R
in place and R
compensation (from step 2).
Setting Frequency
The switching frequency of the LTC4268-1 is set by an
external capacitor connected between the OSC pin and
ground. Recommended values are between 200pF and
33pF , yielding switching frequencies between 50kHz and
250kHz. Figure 14 shows the nominal relationship between
external capacitance and switching frequency. Place the
capacitor as close as possible to the IC and minimize OSC
trace length and area to minimize stray capacitance and
potential noise pickup.
You can synchronize the oscillator frequency to an
external frequency. This is done with a signal on the SYNC
pin. Set the LTC4268-1 frequency 10% slower than the
desired external frequency using the OSC pin capacitor,
then use a pulse on the SYNC pin of amplitude greater
than 2V and with the desired frequency. The rising edge
of the SYNC signal initiates an OSC capacitor discharge
forcing primary MOSFET off (PG voltage goes low). If
the oscillator frequency is much different from the sync
frequency, problems may occur with slope compensation
and system stability. Keep the sync pulse width greater
than 500ns.
Selecting Timing Resistors
There are three internal “one-shot” times that are
programmed by external application resistors: minimum
on time, enable delay time and primary MOSFET turn-on
delay. These are all part of the isolated fl yback control
technique, and their functions are previously outlined in
the Theory of Operation section. The following information
should help in selecting and/or optimizing these timing
values.
LTC4268-1
36
C MP
S(OUT)CMP
is the new value for the load compensation
S(OUT)
is the output impedance with no load
is the output impedance with R
CMP
Minimum Output Switch On Time (t
Minimum on time is the programmable period during which
current limit is blanked (ignored) after the turn on of the
primary side switch. This improves regulator performance
by eliminating false tripping on the leading edge spike in
the switch, especially at light loads. This spike is due to
both the gate/source charging current and the discharge of
drain capacitance. The isolated fl yback sensing requires a
pulse to sense the output. Minimum on time ensures that
the output switch is always on a minimum time and that
there is always a signal to close the loop. The LTC4268-1
does not employ cycle skipping at light loads. Therefore,
minimum on time along with synchronous rectifi cation sets
the switch over to forced continuous mode operation.
The t
Keep R
is 160k.
Enable Delay Time (ENDLY)
Enable delay time provides a programmable delay between
turn-off of the primary gate drive node and the subsequent
enabling of the feedback amplifi er. As discussed earlier, this
delay allows the feedback amplifi er to ignore the leakage
inductance voltage spike on the primary side. The worst-case
leakage spike pulse width is at maximum load conditions.
So set the enable delay time at these conditions.
While the typical applications for this part use forced
continuous operation, it is conceivable that a secondary
side controller might cause discontinuous operation at
light loads. Under such conditions the amount of energy
stored in the transformer is small. The fl yback waveform
becomes “lazy” and some time elapses before it indicates
R
tON MIN
ON(MIN)
tON(MIN)
(
)
( )
resistor is set with the following equation
k
Ω
greater than 70k. A good starting value
=
t
ON MIN
(
1 063
)
.
( )
ns
− 104
ON(MIN)
)
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