ltc4268cdkd-1-trpbf Linear Technology Corporation, ltc4268cdkd-1-trpbf Datasheet - Page 35

• Manufacturer Part Number: ltc4268cdkd-1-trpbf
• Description: High Power Pd With Synchronous Noopto Flyback Controller
• Manufacturer: Linear Technology Corporation

APPLICATIONS INFORMATION
assume that our worst-case conditions yield an I
above nominal so I
on R
110% = 88mV/2.3A and nominal R
to the nearest available lower value, 33mΩ.
Selecting the Load Compensation Resistor
The expression for R
section as:
Continuing the example:
This value for R
methods are required for producing the best results. This is
because several of the required input variables are diffi cult
to estimate precisely. For instance, the ESR term above
includes that of the transformer secondary, but its effective
ESR value depends on high frequency behavior, not simply
DC winding resistance. Similarly, K1 appears as a simple
ratio of V
estimating effi ciency is not a simple calculation.
The suggested empirical method is as follows:
1. Build a prototype of the desired supply including the
actual secondary components.
R
If
CMP
SENSE
ESR R
K1=
DC=
R
CMP
=
⎛
⎝ ⎜
+
1+
IN
K
and minimum V
V
=
=
1
V
IN
D
N•V
to V
0 116
3 25
OUT
•
S S ON
.
•
.
R
(
CMP
Eff
V
ESR R
1 1
IN(NOM)
SENSE
OUT
OUT
k
)
⎞
⎠ ⎟
PK
is a good starting point, but empirical
=
•
=
+
33
8
CMP
= 2.3A. If there is a 10% tolerance
times effi ciency, but theoretically
48 90
m
•
m
(
DS ON
=
Ω
1
Ω
•
−
was derived in the Operation
(
5
1
SENSE
+
•
8
DC
(
m
%
)
8
1
1 0 455
1
)
Ω
−
•
•
=
48
= 88mV, then R
R N
5
SENSE
0 116
.
1
.
•
=
45 5
)
SF
= 35mΩ. Round
•
. %
3
7 7 4
.
k
PK
Ω
SENSE
of 40%
•
3
1
•
2. Temporarily ground the C
compensation function. Measure output voltage while
sweeping output current over the expected range.
Approximate the voltage variation as a straight line.
ΔV
3. Calculate a value for the K1 constant based on V
and the measured effi ciency.
4. Compute:
5. Verify this result by connecting a resistor of this value
from the R
6. Disconnect the ground short to C
fi lter capacitor to ground. Measure the output impedance
R
place. R
tuning is accomplished experimentally by slightly altering
R
S(OUT)
CMP
OUT
R
R
′
CMP
CMP
. A revised estimate for R
/ΔI
S(OUT)
= ΔV
OUT
= 1
=
CMP
Figure 14. f
K
R
300
200
100
CMP
50
= R
•
OUT
should have decreased signifi cantly. Fine
R
R
pin to ground.
S(OUT)
S OUT
SENSE
•
/ΔI
(
30
⎛
⎜
⎝
1
OUT
OSC
+
)
R
.
•
vs OSC Capacitor Values
S OUT CMP
R N
with the new compensation in
R
(
1
S OUT
C
•
(
OSC
CMP
)
CMP
SF
(pF)
)
100
CMP
pin to disable the load
is:
⎞
⎟
⎠
LTC4268-1
and connect a 0.1μF
42681 F02
200
IN
35
, V
42681fa
OUT