ltc4268cdkd-1-trpbf Linear Technology Corporation, ltc4268cdkd-1-trpbf Datasheet - Page 25

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ltc4268cdkd-1-trpbf

Manufacturer Part Number
ltc4268cdkd-1-trpbf
Description
High Power Pd With Synchronous Noopto Flyback Controller
Manufacturer
Linear Technology Corporation
Datasheet
APPLICATIONS INFORMATION
is necessary to include diode D9 to prevent the adapter
from applying power to the LTC4268-1. Power priority
issues require more intervention. If the adapter voltage
is below the PSE voltage, then the priority will be given
to the PSE power. The PD will draw power from the PSE
while the adapter will remain unused. This confi guration is
acceptable in a typical PoE system. However, if the adapter
voltage is higher than the PSE voltage, the PD will draw
power from the adapter. In this situation, it is necessary to
address the issue of power cycling that may occur if a PSE
is present. The PSE will detect the PD and apply power. If
the PD is being powered by the adapter, then the PD will
not meet the minimum load requirement and the PSE may
subsequently remove power. The PSE will again detect the
PD and power cycling will start. With an adapter voltage
above the PSE voltage, it is necessary to either disable the
signature as shown in option 2, or install a minimum load
on the output of the LTC4268-1 to prevent power cycling.
A 3k, 1W resistor connected between V
will present the required minimum load.
Option 3 applies power directly to the DC/DC converter
bypassing the LTC4268-1 and omitting diode D9. With
the diode omitted, the adapter voltage is applied to the
LTC4268-1 in addition to the DC/DC converter. For this
reason, it is necessary to ensure that the adapter maintain
the voltage between 42V and 57V to keep the LTC4268-1
in its normal operating range. The third option has the
advantage of corrupting the 25k signature resistance when
the external voltage exceeds the PSE voltage and thereby
solving the power priority issue.
Option 4 bypasses the entire PD interface and injects
power at the output of the low voltage power supply. If
the adapter output is below the low voltage output there
are no power priority issues. However, if the adapter is
above the internal supply, then option 4 suffers from the
PORTP
and V
NEG
same power priority issues as option 2 and the signature
should be disabled or a minimum load should be installed.
Shown in option 4 is one method to disable to the signature
while maintaining isolation.
If employing options 1 through 3, it is necessary to ensure
that the end-user cannot access the terminals of the aux-
iliary power jack on the PD since this would compromise
IEEE 802.3af isolation requirements and may violate local
safety codes. Using option 4 along with an isolated power
supply addresses the isolation issue and it is no longer
necessary to protect the end-user from the power jack.
The above power cycling scenarios have assumed the
PSE is using DC disconnect methods. For a PSE using
AC disconnect, a PD with less than minimum load will
continue to be powered.
Wall adapters have been known to generate voltage spikes
outside their expected operating range. Care should be
taken to ensure no damage occurs to the LTC4268-1 or any
support circuitry from extraneous spikes at the auxiliary
power interface.
Classifi cation Resistor Selection (R
The IEEE 802.3af specifi cation allows classifying PDs into
four distinct classes with class 4 being reserved for future
use (Table 2). The LTC4268-1 supports all IEEE classes
and implements an additional Class 5 for use in custom
PoE applications. An external resistor connected from
R
current. The designer should determine which class the
PD is to advertise and then select the appropriate value of
R
the value of R
CLASS
CLASS
R
CLASS
from Table 2. If a unique load current is required,
to V
= 1.237V/(I
PORTN
CLASS
(Figure 6) sets the value of the load
can be calculated as:
LOAD
– I
IN_CLASS
LTC4268-1
CLASS
)
)
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