mcf54455 Freescale Semiconductor, Inc, mcf54455 Datasheet - Page 38

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mcf54455

Manufacturer Part Number
mcf54455
Description
32-bit Microprocessor With Usb On-the-go, Ethernet, Pci, Ddr2/ddr Controller And Encryption
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Electrical Characteristics
38
1
2
3
4
5
Name
DS10
DS11
DS12
DS13
DS14
Timings shown are for DMCR[MTFE] = 0 (classic SPI) and DCTARn[CPHA] = 0. Data is sampled on the DSPI_SIN pin
on the odd-numbered DSPI_SCK edges and driven on the DSPI_SOUT pin on even-numbered DSPI edges.
When in master mode, the baud rate is programmable in DCTARn[DBR], DCTARn[PBR], and DCTARn[BR].
This specification assumes a 50/50 duty cycle setting. The duty cycle is programmable in DCTARn[DBR],
DCTARn[CPHA], and DCTARn[PBR].
The DSPI_PCSn to DSPI_SCK delay is programmable in DCTARn[PCSSCK] and DCTARn[CSSCK].
The DSPI_SCK to DSPI_PCSn delay is programmable in DCTARn[PASC] and DCTARn[ASC].
DSPI_SCK to DSPI_SOUT invalid
DSPI_SIN to DSPI_SCK input setup
DSPI_SCK to DSPI_SIN input hold
DSPI_SS active to DSPI_SOUT driven
DSPI_SS inactive to DSPI_SOUT not driven
(DCTARn[CPOL] = 1)
(DCTARn[CPOL] = 0)
DSPI_SOUT
DSPI_PCSn
Table 26. DSPI Module AC Timing Specifications
DSPI_SCK
DSPI_SCK
DSPI_SIN
Characteristic
Figure 23. DSPI Classic SPI Timing — Master Mode
MCF5445x ColdFire
DS7
First Data
DS3
First Data
DS8
®
DS6
Microprocessor Data Sheet, Rev. 0
DS2
Symbol
DS2
Data
Data
Min
0
2
7
Last Data
DS1
Last Data
DS5
1
(continued)
DS4
Max
10
10
Freescale Semiconductor
Unit
ns
ns
ns
ns
ns
Notes

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