mcf5274l Freescale Semiconductor, Inc, mcf5274l Datasheet - Page 60

• Manufacturer Part Number: mcf5274l
• Description: Mcf5275 Integrated Microprocessor Family Hardware
• Manufacturer: Freescale Semiconductor, Inc

Preliminary Electrical Characteristics
Figure 13
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5
6
7
The first data beat will be valid before the first rising edge of SD_DQS and after the SD_DQS write preamble. The
remaining data beats will be valid for each subsequent SD_DQS edge
Data input skew is derived from each SD_DQS clock edge. It begins with a SD_DQS transition and ends when the last data
line becomes valid. This input skew must include DDR memory output skew and system level board skew (due to routing or
other factors).
Data input hold is derived from each SD_DQS clock edge. It begins with a SD_DQS transition and ends when the first data
line becomes invalid.
SD_SRAS,SD_SCAS
SD_CSn,SD_WE,
DDR_CLKOUT
DDR_CLKOUT
DDR_CLKOUT
DDR_CLKOUT
SD_DQS[3:2]
shows a DDR SDRAM write cycle.
D[31:16]
DM[3:2]
A[13:0]
MCF5275 Integrated Microprocessor Family Hardware Specification, Rev. 1.1
Figure 12. DDR_CLKOUT and DDR_CLKOUT crossover timing
DD4
ROW
CMD
DD1
Figure 13. DDR Write Timing
DD5
Preliminary
COL
DD6
WD1 WD2 WD3 WD4
DD2
DD3
DD7
DD7
DD8
DD8
Freescale Semiconductor
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