st5080d STMicroelectronics, st5080d Datasheet - Page 19

• Manufacturer Part Number: st5080d
• Description: Piafe Programmable Isdn Audio Front End
• Manufacturer: STMicroelectronics

Microwire access to B channel on receive
path
Bit MR (4) selects access from MICROWIRE
Register CR2 to Receive path. When bit MR is
set high, data written to register CR2 is decoded
each frame, sent to the receive path and data in-
put at D
In the other direction, current PCM data input re-
ceived at D
frame.
Microwire access to B channel on transmit
path
Bit MX (3) selects access from MICROWIRE write
only Register CR3 to D
set high, data written to CR3 is output at D
frame and the output of PCM encoder is ignored.
B channel selection
Bit ’EN’ (2) enables or disables voice data trans-
fer on D
from DR is not decoded and PCM time-slots are
high impedance on D
In GCI mode, bits ’T1’ (1) and ’T0’ (0) select one
of the four channels of the GCI interface.
In COMBO I/II mode, only B1 or B2 channel can
be selected according to the interface format se-
lected. Bit ’T1’ is ignored.
CONTROL REGISTER CR2
Data sent to receive path or data received from
D
CR1” paragraph.
CONTROL REGISTER CR3
D
Rgister CR1” paragraph.
CONTROL REGISTER CR4
First byte of a READ or a WRITE instruction to
Control Register CR4 is as shown in TABLE 1.
Second byte is as shown in TABLE 6.
Transmit Input Selection
MIC1 or MIC2 source is selected with bit VS (7).
Transmit input selected can be enabled or muted
with bit TE (6).
Transmit gain can be adjusted within a 15 dB
range in 1 dB step with Register CR5.
Sidetone select
Bit ”SI” (5) enables or disables Sidetone circuitry.
When enabled, sidetone gain can be adjusted
with Register (CR5). When Transmit path is dis-
abled, bit TE set low, sidetone circuit is also dis-
abled.
External Auxiliary signal select
Bit ”EE” (4) set to one connects EAIN input to the
R
X
data transmitted. Refer to bit MX(3) in ”Control
input. Refer to bit MR(4) in ”Control Register
R
X
is ignored.
and D
R
can be read from register CR2 each
R
pins. When disabled, PCM data
X
.
X
output. When bit MX is
X
every
loudspeaker amplifier input.
Ring/Tone signal routing
Bits ”RTL” (3) and RTE (2) provide select capabil-
ity to connect on-chip Ring/Tone generator either
to loudspeaker amplifier input or to earpiece am-
plifier input or both.
PCM receive data routing
Bits ”SL” (1) and ”SE” (0) provide select capability
to connect received speech signal either to Loud-
speaker amplifier input or to earpiece amplifier in-
put or both.
CONTROL REGISTER CR5
First byte of a READ or a WRITE instuction to
Control Register CR5 is as shown in TABLE 1.
Second byte is as shown in TABLE 7.
Transmit gain selection
Transmit amplifier can be programmed for a gain
from 0dB to 15dB in 1dB step with bits 4 to 7.
0 dBmO level at the output of the transmit ampli-
fier (A reference point) is 0.739 Vrms (overload
voltage is 1.06 Vrms).
Sidetone attenuation selection
Transmit signal picked up after the switched ca-
pacitor low pass filter may be fed back into the
Receive Earpiece amplifier.
Atten uation of the signa l at the output of the
sidetone attenu ator can be programmed from
–12.5dB to -27 .5dB relative to reference point
A in 1 dB step with bits 0 to 3.
CONTROL REGISTER CR6
First byte of a READ or a WRITE instruction to
Control Register CR6 is as shown in TABLE 1.
Second byte is as shown in TABLE 8.
Earpiece amplifier gain selection:
Earpiece Receive gain can be programmed in 1
dB step from 0 dB to -15 dB relative to the maxi-
mum with bits 4 to 7.
0 dBmO voltage at the output of the amplifier on
pins V
0dB gain is selected down to 146.6 mVrms
when –15 dB gain is selected.
Loudspeaker amplifier gain selection:
Loudspeaker Receive amplifier gain can be pro-
grammed in 2 dB step from 0 dB to -30 dB rela-
tive to the maximum with bits 0 to 3.
0 dBmO voltage on the output of the amplifier on
pins LS+ and LS- on 50
(3.91V
43.7 mVrms (123.6mV
lected.
pp
Fr+
) when 0 dB gain is selected down to
and V
Fr-
is then 824.5 mVrms when
pp
) when -30 dB gain is se-
is then 1.384 Vrms
ST5080A
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