st5080d STMicroelectronics, st5080d Datasheet
st5080d
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st5080d Summary of contents
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... TEA7540. ON CHIP SWITCHABLE ANTI-ACOUSTIC FEED-BACK CIRCUIT (ANTI-LARSEN). December 1994 This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice. ORDERING NUMBER: ST5080D AUXILIARY General Features: EXTENDED TEMPERATURE RANGE OP- ERATION (*) – +85 C. EXTENDED POWER SUPPLY RANGE 5V 10%. ...
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ST5080A PIN CONNECTIONS (Top view) BLOCK DIAGRAM 2/32 ...
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TYPICAL ISDN TELEPHONE SET APPLICATION ST5080A 3/32 ...
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ST5080A GENERAL DESCRIPTION ST5080A PIAFE is a combined PCM CODEC/FIL- TER device optimized for ISDN Terminals and Digi- tal Telephone applications. This device is A-law and Mu-law selectable and offers a number of pro- grammable functions accessed through a serial ...
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PIN FUNCTIONS (continued) Pin Name N. MCLK N.C. 21 MIC2+ 22 MIC1+ 23 MIC1 CCA 26 MIC2- 27 GNDA 28 EAIN ...
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ST5080A Following pin definitions are used only when COMBO I/II mode with separate MICROWIRE com- patible serial control port is selected. (MS input set equal one) PIN FUNCTIONS (continued) Pin Name CCLK 20 CS- Following ...
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FUNCTIONAL DESCRIPTION Power on initialization: When power is first applied, power on reset cicuitry initializes PIAFE and puts it into the power down state. Gain Control Registers for the various programmable gain amplifiers and programmable switches are initialized as indicated ...
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ST5080A rectly drive an earpiece. Preceding the outputs is a programmable attenuation amplifier, which must be set by writing to bits register CR6. At- tenuations in the range 0 to -15 dB relative to the maximum ...
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Figure 1: Digital Interface Format Figure 2: GCI Interface Frame Structure output shifts data out from the voice data register on the rising edges of MCLK. Serial voice data is shifted into D input during the same time slot on ...
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ST5080A the 2nd control byte, data is loaded into the ap- propriate programmable register. CS- must return high at the end of the 2nd byte. To read-back status information from PIAFE, the first byte of the appropriate instruction is strobed ...
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Protocol allows a bidirectional transfer of bytes between ST5080A and GCI controller with ac- knowledgment at each received byte. For PIAFE, standard protocol is simplified to provide read or write register cycles almost identical to MI- CROWIRE serial interface. Write ...
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ST5080A Figure 3: E and A bits Timing 12/32 ...
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For both formats of Digital Interface, programma- ble functions are configured by writing to a num- ber of registers using a 2-byte write cycle (not in- cluding chip select byte in GCI). Most of these registers can also be read-back ...
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ST5080A Table 2: Control Register CR0 Functions state at ...
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Table 4: Control Register CR2 Functions msb Table 5: Control Registers CR3 Functions msb Table 6: ...
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ST5080A Table 7: Control Register CR5 Functions Transmit amplifier Sidetone amplifier ...
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Table 9: Control Register CR7 Functions Tone gain ...
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ST5080A CONTROL REGISTER CR0 First byte of a READ or a WRITE instruction to Control Register CR0 is as shown in TABLE 1. Second byte is as shown in TABLE 2. Master Clock Frequency Selection A master clock must be ...
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Microwire access to B channel on receive path Bit MR (4) selects access from MICROWIRE Register CR2 to Receive path. When bit MR is set high, data written to register CR2 is decoded each frame, sent to the receive path ...
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ST5080A Current limitation is approximatively 150 mApk. CONTROL REGISTER CR7: First byte of a READ or a WRITE instruction to Control Register CR7 is as shown in TABLE 1. Second byte is as shown in TABLE 9. Tone/Ring amplifier gain ...
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Table 12: Examples of Usual Frequency Selection Description f1 value (decimal) Tone 250 Hz 32 Tone 330 Hz 42 Tone 425 Hz 54 Tone 440 Hz 56 Tone 800 Hz 102 Tone 1330 Hz 170 DTMF 697 Hz 89 DTMF ...
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ST5080A TIMING DIAGRAM Non Delayed Data Timing Mode Delayed Data Timing Mode 22/32 ...
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TIMING DIAGRAM (continued) GCI Timing Mode Serial Control Timing (MICROWIRE MODE) ST5080A 23/32 ...
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ST5080A ABSOLUTE MAXIMUM RATINGS Parameter V to GND CC Current 5.5V) MIC CC Current at V and LS RxO Current at any digital output Voltage at any digital input (V 5.5V); limited at + 50mA CC Storage ...
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SERIAL CONTROL PORT TIMING (Usual COMBO mode only) Symbol Parameter f Frequency of CCLK CCLK t Period of CCLK high WCH t Period of CCLK low WCL t Rise Time of CCLK RC t Fall Time of ...
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ST5080A ANALOG INTERFACES Symbol Parameter I Input Leakage MIC R Input Resistance MIC R Load Resistance LVFr C Load Capacitance LVFr R Output Resistance OVFr0 V Differential offset: OSVFr0 Voltage Fr+ Fr- R Load Resistance LLS ...
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TRANSMISSION CHARACTERISTICS (continued) AMPLITUDE RESPONSE (Maximum, Nominal, and Minimum Levels) Receive path - Absolute levels at V Parameter 0 dBM0 level 0 dBM0 level AMPLITUDE RESPONSE (Maximum, Nominal, and Minimum Levels) Receive path - Absolute levels at L Parameter 0 ...
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ST5080A AMPLITUDE RESPONSE Receive path Symbol Parameter G Receive Gain Absolute Accuracy RAE G Receive Gain Absolute Accuracy RAL G Receive Gain Variation with RAGE programmed gain G Receive Gain Variation with RAGL programmed gain G Receive Gain Variation with ...
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ENVELOPE DELAY DISTORTION WITH FREQUENCY Symbol Parameter DXA Tx Delay, Absolute DXR Tx Delay, Relative DRA Rx Delay, Absolute DRR Rx Delay, Relative NOISE Symbol Parameter NXC Tx Noise, C weighted NXP Tx Noise, P weighted NREC Rx Noise, C ...
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ST5080A DISTORTION Symbol Parameter S Signal to Total Distortion TDx S TDr S Single Frequency Distortion DFx transmit S Single Frequency Distortion DFr receive IMD Intermodulation CROSSTALK Symbol Parameter C Transmit to Receive Tx-r C Receive to Transmit Tr-x APPLICATION ...
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SO28 PACKAGE MECHANICAL DATA DIM. MIN 0.1 b 0. 7 TYP. MAX. MIN. 2.65 0.3 0.004 0.49 0.014 0.32 0.009 0.5 45 (typ.) ...
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ST5080A Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from ...