S25FL032A Meet Spansion Inc., S25FL032A Datasheet - Page 3

• Manufacturer Part Number: S25FL032A
• Description: 32 Megabit Cmos 3.0 Volt Flash Memory With 50 Mhz Spi Bus Interface
• Manufacturer: Meet Spansion Inc.

Distinctive Characteristics
General Description
Architectural Advantages
S25FL032A
32 Megabit CMOS 3.0 Volt Flash Memory
with 50-MHz SPI (Serial Peripheral Interface) Bus
Data Sheet
Single power supply operation
– Full voltage range: 2.7 to 3.6 V read and program operations
Memory Architecture
– 64 sectors with 512 Kb each
Program
– Page Program (up to 256 bytes) in 1.4 ms (typical)
– Program operations are on a page by page basis
Erase
– 0.5 s typical sector erase time
– Bulk erase function
Cycling Endurance
– 100,000 cycles per sector typical
Data Retention
– 20 years typical
Device ID
– JEDEC standard two-byte electronic signature
– RES command one-byte electronic signature for backward
compatibility
Publication Number S25FL032A_00
The S25FL032A is a 3.0 Volt (2.7 V to 3.6 V), single-power-supply Flash memory device. The device consists
of 64 sectors, each with 512 Kb memory.
The device accepts data written to SI (Serial Input) and outputs data on SO (Serial Output). The devices are
designed to be programmed in-system with the standard system 3.0 volt V
The memory can be programmed 1 to 256 bytes at a time, using the Page Program command. The device
supports Sector Erase and Bulk Erase commands.
Each device requires only a 3.0 volt power supply (2.7 V to 3.6 V) for both read and write functions. Internally
generated and regulated voltages are provided for the program operations. This device does not require a
V
PP
supply.
Revision C
Performance Characteristics
Memory Protection Features
Software Features
Process Technology
– Manufactured on 0.20 µm MirrorBit
Package Option
– Industry Standard Pinouts
– 16-pin SO package (300 mils)
Speed
– 50 MHz clock rate (maximum)
Power Saving Standby Mode
– Standby Mode 50 µA (max)
– Deep Power Down Mode 2 µA (typical)
Memory Protection
– W# pin works in conjunction with Status Register Bits to protect
– Status Register Block Protection bits (BP2, BP1, BP0) in status
– SPI Bus Compatible Serial Interface
Amendment 2
specified memory areas
register configure parts of memory as read-only
Issue Date July 2, 2007
CC
supply.
®
process technology