S25FL032A Meet Spansion Inc., S25FL032A Datasheet - Page 26

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S25FL032A

Manufacturer Part Number
S25FL032A
Description
32 Megabit Cmos 3.0 Volt Flash Memory With 50 Mhz Spi Bus Interface
Manufacturer
Meet Spansion Inc.
Datasheet

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10. Power-up and Power-down
26
Notes
1. The S25FL032A has a manufacturer ID of 01h, and a device ID consisting of the memory type (02h) and the memory capacity (15h).
2. The S25FL032A has an Electronic Signature ID of 15h.
During power-up and power-down, certain conditions must be observed. CS# must follow the voltage applied
on V
(see
A pull-up resistor on Chip Select (CS#) typically meets proper power-up and power-down requirements.
No Write Status Register, program, or erase command should be sent to the device until V
min, plus a delay of t
WEL bit is reset (0).
Each device in the host system should have the V
package pins (this capacitor is generally of the order of 0.1 µF), as a precaution to stabilizing the V
When V
operations are disabled and the device does not respond to any commands. Note that data corruption may
result if a power-down occurs while a Write Register, program, or erase operation is in progress.
Status Register
Figure 9.13 Release from Deep Power Down and Read Electronic Signature (RES) Command Sequence
Power Saving
Write Control
SCK
CS#
At power-up, V
At power-down, V
Operation
SO
Program
SI
CC
Erase
Read
Figure 10.1
, and must not be driven low to select the device until V
CC
Hi-Z
drops from the operating voltage to below the minimum V
FAST_READ
Command
and
CC
WREN
WRSR
READ
RDSR
WRDI
RDID
RES
0
DP
SE
BE
PP
SS
(min) plus a period of t
PU
Table 10.1 on page
1
. At power-up, the device is in standby mode (not Deep Power Down mode) and the
2
Command
3
Read Data Bytes
Read Data Bytes at Higher Speed
Read Identification
Write Enable
Write Disable
Sector Erase
Bulk (Chip) Erase
Page Program
Read from Status Register
Write to Status Register
Deep Power Down
Release from Deep Power Down
Release from Deep Power Down and
Read Electronic Signature
4
5
6
Table 9.4 Command Definitions
Description
S25FL032A
7
MSB
27):
23 22 21
8
PU
(Note 1)
D a t a
9 10
3 Dummy Bytes
CC
(Note 2)
rail decoupled by a suitable capacitor close to the
28 29 30 31 32 33 34 35 36 37 38
3 2
Deep Power-down Mode
S h e e t
1
ABH (1010 1011)
ABH (1010 1011)
Command Code
0BH (0000 1011)
9FH (1001 1111)
D8H (1101 1000)
C7H (1100 0111)
B9H (1011 1001)
03H (0000 0011)
06H (0000 0110)
04H (0000 0100)
02H (0000 0010)
05H (0000 0101)
01H (0000 0001)
0
CC
MSB
One-Byte
7
reaches the allowable values as follows
6
CC
5
Electronic ID out
threshold at power-down, all
4
Address
3
S25FL032A_00_C2 July 2, 2007
Bytes
0
0
0
2
3
3
0
0
3
0
3
0
0
0
1
0
Dummy
Byte
0
1
0
0
0
0
0
0
0
0
0
0
3
CC
t
RES
rises to the V
Data Bytes
Standby Mode
1 to 256
CC
1 to ∞
1 to ∞
1 to ∞
1 to ∞
1 to 3
0
0
0
0
1
0
0
feed.
CC

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