LDS-L9D340G64BG2 LOGIC Devices Incorporated, LDS-L9D340G64BG2 Datasheet - Page 145

no-image

LDS-L9D340G64BG2

Manufacturer Part Number
LDS-L9D340G64BG2
Description
4.0 Gb, Ddr3, 64 M X 64 Integrated Module Imod
Manufacturer
LOGIC Devices Incorporated
Datasheet
LOGIC Devices Incorporated
F
F
IGURE
IGURE
DQS, DQS#
DQS, DQS#
Command
Command
101 - D
Add ress
102 - D
Add ress
ODT
CK#
DQ
R
CK
TT
CK#
ODT
DQ
CK
R
TT
N
T0
O
P
Vali d
YNAMIC
YNAMIC
T0
N
T1
Notes:
O
Notes:
P
www.logicdevices.com
Vali d
ODT: ODT A
ODT: W
N
T2
T1
O
P
1. Via MRS or OTF. AL = 0, CWL = 5. R
2. ODTH4 applies to first registering ODT HIGH and then to the registration of the WRITE command. In this example,
ODTL on
1. AL = 0, CWL = 5. R
2. ODTH4 is defined from ODT registered HIGH to ODT registered LOW; in this example,
ODTH4 is satisfied if ODT goes LOW at T8 (four clocks after the WRITE command).
ODTH4
N
ODTH4 is satisfied. ODT registered LOW at T5 is also legal.
T3
O
P
Vali d
ITHOUT
T2
WRS4
Vali d
T4
ODTL on
t AON (MIN)
t AON (MAX)
SSERTED
t AON (MIN)
ODTH4
t AON (MAX)
WRITE C
Vali d
N
T3
T5
O
P
ODTL
R
TT
CNW
TT
_
ODTH4
NOM
NOP
_
T 6
B
NOM
Vali d
T4
EFORE AND
WL
OMMAND
is enabled and R
NOP
T7
4.0 Gb, DDR3, 64 M x 64 Integrated Module (IMOD)
TT
ODTL
_
NOM
CWN
Vali d
t ADC (MIN)
t ADC (MAX)
T5
4
NOP
T8
and R
A
TT
FTER THE
NOP
T9
DI
n
_
Vali d
WR
R
T6
TT
TT
n + 1
_
DI
WR
are enabled.
_
PRELIMINARY INFORMATION
WR
T10
n + 2
NOP
DI
is either enabled or disabled.
n + 3
WRITE, BC4
DI
Vali d
T7
NOP
T11
High Performance, Integrated Memory Module Product
R
TT
_
NOM
t ADC (MIN)
t ADC (MAX)
NOP
T12
Vali d
T8
ODTL off
NOP
T13
t AOF (MIN)
Vali d
T9
R
t AOF (MAX)
TT
Transitionin g
_
NOP
T14
NOM
ODTL off
L9D340G64BG2
NOP
Transitioning
Vali d
T15
T10
Jun 08, 2010 LDS-L9D340G64BG2-B
NOP
T16
Don ’t Care
Vali d
T11
Don ’t Care
t AOF (MIN)
t AOF (MAX)
NOP
T17

Related parts for LDS-L9D340G64BG2