ds3171n Maxim Integrated Products, Inc., ds3171n Datasheet - Page 168

• Manufacturer Part Number: ds3171n
• Description: Ds3171, Ds3172, Ds3173, Ds3174 Single/dual/triple/quad Ds3/e3 Single-chip Transceivers
• Manufacturer: Maxim Integrated Products, Inc.

Register Name:
Register Description:
Register Address:
Bit #
Name
Bit #
Name
Bit 3: Receive FEAC FIFO Empty (RFFE) – When 0, the Receive FIFO contains at least one code. When 1, the
Receive FIFO is empty.
Bit 1: Receive FEAC Codeword Detect (RFCD) – When 0, the Receive FEAC Processor is not currently receiving
a FEAC codeword. When 1, the Receive FEAC Processor is currently receiving a FEAC codeword.
Bit 0: Receive FEAC Idle (RFI) – When 0, the Receive FEAC processor is not receiving a FEAC Idle signal (all
ones). When 1, the Receive FEAC processor is receiving a FEAC Idle signal.
Register Name:
Register Description:
Register Address:
Bit #
Name
Bit #
Name
Bit 2: Receive FEAC FIFO Overflow Latched (RFFOL) – This bit is set when a Receive FIFO overflow condition
occurs. An overflow condition results in a loss of data.
Bit 1: Receive FEAC Codeword Detect Latched (RFCDL) – This bit is set when the RFCD bit transitions from 0
to 1.
Bit 0: Receive FEAC Idle Latched (RFIL) – This bit is set when the RFI bit transitions from 0 to 1. Note:
Immediately after a reset, this bit will be set to one.
15
15
--
--
--
--
7
7
14
14
--
--
--
--
6
6
FEAC.RSR
FEAC Receive Status Register
(0,2,4,6)D4h
FEAC.RSRL
FEAC Receive Status Register Latched
(0,2,4,6)D6h
13
13
--
--
--
--
5
5
12
12
--
--
--
--
4
4
168
RFFE
11
11
--
--
--
3
3
RFFOL
10
10
--
--
--
2
2
RFCDL
RFCD
--
--
9
1
9
1
RFIL
RFI
--
--
8
0
8
0