ds3171n Maxim Integrated Products, Inc., ds3171n Datasheet - Page 151
ds3171n
Manufacturer Part Number
ds3171n
Description
Ds3171, Ds3172, Ds3173, Ds3174 Single/dual/triple/quad Ds3/e3 Single-chip Transceivers
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
1.DS3171N.pdf
(234 pages)
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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 7 to 0: Bit Error Count (BEC[23:16]) - Upper 8-bits of Register.
Bit Error Count (BEC[23:0]) – These twenty-four bits indicate the number of bit errors detected in the incoming
data stream. This count stops incrementing when it reaches a count of FF FFFFh. This bit error counter will not
increment when an OOS condition exists. This register is updated via the PMU signal (see Section 10.4.5).
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 15 to 0: Bit Count (BC[15:0]) – Lower sixteen bits of 32 bits. Register description follows next register.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 15 to 0: Bit Count (BC[31:16]) - Upper 16 bits of 32 bits.
Bit Count (BC[31:0]) – These thirty-two bits indicate the number of bits in the incoming data stream. This count
stops incrementing when it reaches a count of FFFF FFFFh. This bit counter will not increment when an OOS
condition exists. This register is updated via the PMU signal (see Section 10.4.5).
BEC23
BC15
BC31
BC23
BC7
15
15
15
--
0
7
0
0
7
0
0
7
0
BEC22
BC14
BC30
BC22
BC6
14
14
14
--
0
6
0
0
6
0
0
6
0
BERT.RBECR2
BERT Receive Bit Error Count Register #2
(0,2,4,6)76h
BERT.RBCR1
Receive Bit Count Register #1
(0,2,4,6)78h
BERT.RBCR2
Receive Bit Count Register #2
(0,2,4,6)7Ah
BEC21
BC13
BC29
BC21
BC5
13
13
13
--
0
5
0
0
5
0
0
5
0
BEC20
BC12
BC28
BC20
BC4
12
12
12
--
0
0
0
0
0
0
4
4
4
151
BEC19
BC11
BC27
BC19
BC3
11
11
11
--
0
3
0
0
3
0
0
3
0
BEC18
BC10
BC26
BC18
BC2
10
10
10
--
0
2
0
0
2
0
0
2
0
BEC17
BC25
BC17
BC9
BC1
--
9
0
1
0
9
0
1
0
9
0
1
0
BEC16
BC24
BC16
BC8
BC0
--
8
0
0
0
8
0
0
0
8
0
0
0
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