74f50109 NXP Semiconductors, 74f50109 Datasheet - Page 7

• Manufacturer Part Number: 74f50109
• Description: Synchronizing Dual J-k Positive Edge-triggered Flip-flop With Metastable Immune Characteristics
• Manufacturer: NXP Semiconductors

1. | t
2. Skew times are valid only under same test conditions (temperature, V
Philips Semiconductors
AC ELECTRICAL CHARACTERISTICS
NOTES:
AC SETUP REQUIREMENTS
September 14, 1990
SYMBOL
f
t
t
t
t
t
SYMBOL
t
t
t
t
t
t
t
t
max
PLH
PHL
PLH
PHL
sk(o)
su
su
h
h
w
w
w
rec
Synchronizing dual J–K positive edge-triggered
flip-flop with metastable immune characteristics
(H)
(L)
(L)
(L)
(L)
(H)
(H)
PN
actual – t
Maximum clock frequency
Propagation delay
CPn to Qn or Qn
Propagation delay
SDn, RDn to Qn or Qn
Output skew
Setup time, high or low
Jn, Kn to CPn
Hold time, high or low
Jn, Kn to CPn
CPn pulse width,
high or low
SDn or RDn pulse width, low
Recovery time
SDn or RDn to CP
PM
actual| for any output compared to any other output where N and M are either LH or HL.
1, 2
PARAMETER
PARAMETER
CONDITION
Waveform 1
Waveform 1
Waveform 2
Waveform 4
CONDITION
Waveform 1
Waveform 1
Waveform 1
Waveform 2
Waveform 3
TEST
TEST
7
CC
, loading, etc.,).
MIN
130
MIN
2.0
2.0
3.5
3.5
1.5
1.5
1.0
1.0
3.0
4.0
3.5
3.0
T
T
V
V
amb
C
amb
R
C
R
CC
CC
L
L
L
L
= 50pF,
= 50pF,
= 500
TYP
= 500
TYP
150
= +5.0V
= +25 C
3.8
3.8
5.5
5.5
= +25 C
= +5.0V
MAX
MAX
6.0
6.0
8.0
8.0
1.5
LIMITS
LIMITS
T
T
V
V
amb
MIN
amb
MIN
2.0
2.0
3.0
3.0
2.0
2.0
1.5
1.5
3.5
5.0
4.0
3.5
90
CC
CC
C
R
C
R
= 0 C to +70 C
= +5.0V
= +5.0V
= 0 C to +70 C
L
L
L
L
= 50pF,
= 500
= 50pF,
= 500
74F50109
Product specification
MAX
MAX
10%
10%
6.5
6.5
8.5
8.5
1.5
UNIT
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns