74f50109 NXP Semiconductors, 74f50109 Datasheet - Page 5

• Manufacturer Part Number: 74f50109
• Description: Synchronizing Dual J-k Positive Edge-triggered Flip-flop With Metastable Immune Characteristics
• Manufacturer: NXP Semiconductors

Philips Semiconductors
MEAN TIME BETWEEN FAILURES (MTBF) VERSUS t’
NOTE: V
TYPICAL VALUES FOR AND T
FUNCTION TABLE
September 14, 1990
SD
H
H
H
H
H
H
L
L
Synchronizing dual J–K positive edge-triggered
flip-flop with metastable immune characteristics
RD
H
H
H
H
H
H
L
L
5.5V
5.0V
4.5V
CC
V
MTBF in seconds
CC
INPUTS
= 5V, T
CP
X
X
X
amb
X
X
X
X
J
h
h
l
l
= 25 C, =135ps, To = 9.8 X 10
125ps
115ps
115ps
K
X
X
X
X
h
h
10,000 years
l
l
one week
100 years
one year
OUTPUTS
Q
H
H
H
L
q
q
L
q
T
amb
Q
H
H
H
q
q
L
q
L
10
10
10
10
10
10
10
0
1.3 X 10
3.4 X 10
1.0 X 10
= 0 C
AT VARIOUS V
12
11
10
9
8
7
6
Asynchronous set
Asynchronous reset
Undetermined*
Hold
Toggle
Load ”1” (set)
Load ”0” (reset)
Hold ’no change”
7
T
OPERATING
0
10
13
9
MODE
sec
sec
sec
8
sec
8
t’ in nanoseconds
CC
10
Figure 4.
6
S AND TEMPERATURES
138ps
135ps
132ps
5
10
8
NOTES:
H = High–voltage level
h = High–voltage level one setup time prior to
L = Low–voltage level
l
q = Lower case indicate the state of the referenced
X = Don’t care
*
9
T
= Low–voltage level one setup time prior to
= Low–to–high clock transition
= Not low–to–high clock transition
= Both outputs will be high if both SD and RD go low
amb
10
low–to–high clock transition
low–to–high clock
transition
output prior to the low–to–high clock transition
simultaneously
= 25 C
5.4 X 10
9.8 X 10
5.1 X 10
10
T
10
10
0
6
6
8
12
sec
sec
sec
10
10
14
15
SF00589
= f
C
f
I
160ps
167ps
175ps
T
amb
74F50109
Product specification
= 70 C
1.7 X 10
3.9 X 10
7.3 X 10
T
0
5
4
4
sec
sec
sec