st2032a Sitronix Technology Corporation, st2032a Datasheet - Page 18

• Manufacturer Part Number: st2032a
• Description: 8 Bit Microcontroller With 32k Bytes Rom
• Manufacturer: Sitronix Technology Corporation

1
Ver 2.4
1
ST2032A has dual clock sources, OSC (RC) and OSCX
(32768Hz crystal). The system clock (SYSCK) can be
switched between OSC and OSCX, and is controlled by XSEL
(SYS[7]). When system clock is switched, the warm-up cycles
occur at the same time. Clock source being used is shown at
Note:
Address Name
1
1
$030
.
1. XSEL (SYS[7]) shows which clock source is used for SYSCK when it is read.
2. System warm-up of 16 or 256 oscillation cycles occurs when system clock (SYSCK) is changed or power on reset.
.
Bit 7: XSEL : SYS [XSEL] must be 0.
Bit 6: OSTP : OSC stop control bit
Bit 5: XSTP : OSCX stop control bit
Bit 4: TEST: Test bit, must be “ 0”
O
O
S
S
SYS
1 = Disable OSC
0 = Enable OSC
1 = Disable OSCX
0 = Enable OSCX
C
C
I
I
L
L
OSCX
L
L
XSEL
OSC
R/W
R/W
A
A
T
T
O
O
R
R
XSEL
Bit 7
OSTP
Bit 6
IN1
TABLE 11-1 System Control Register (SYS)
IN0
FIGURE 11-1 System Clock Diagram
MUX2
SEL
XSTP
Bit 5
OUTPUT
18/54
TEST
Bit 4
XSEL (read). Read and test XSEL to confirm SYSCK is
already switched over. Other blocks, such as LCD controller,
Timer1, Base Timer and PSG, can utilize these two clock
sources as well.
WSKP
Bit 3
Frequency divided by 2
IN
WAIT
Bit 2
/2
OUT
Bit 1
-
LVDET 0000 00-0
Bit 0
SYSCK
Default
ST2032A
9/13/07