st2032a Sitronix Technology Corporation, st2032a Datasheet - Page 10

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st2032a

Manufacturer Part Number
st2032a
Description
8 Bit Microcontroller With 32k Bytes Rom
Manufacturer
Sitronix Technology Corporation
Datasheet
8.2 ROM
8.2.1 Bank Description
Setting corresponding value to register PRR (program memory) when user wants uses different memory bank.
8.3 RAM
Internal static RAM is for control registers, data RAM, stack RAM and the LCD frame buffer.
8.3.1 Control Registers
8.3.2 Data RAM ($0080~$04FF)
Data RAM are organized in 1K bytes from $0080~$04FF.
8.3.3 Stack RAM ($0100~$01FF)
Stack RAM is organized in 256 bytes. It provides for a maximum of 128-level subroutine stacks and can be used as data memory.
8.3.4 LCD Frame Buffer ($1000~$10A3)
LCD frame buffer is accessible by both read/write instructions and LCD controller. Note that this area can also be used as data
memory. Each pixel of LCD panel is directly mapped into this area. Refer to section 15.4 for the detail mapping.
Ver 2.4
Address
Note: 1. Undefined bytes and bits should not be used.
Address
$00A
$03A
$03B
$03C
$000
$001
$002
$008
$009
$00F
$010
$012
$013
$014
$016
$017
$021
$023
$024
$025
$026
$027
$030
$031
$039
$03E
$011
PRR
2. Do not use bit modification instructions for write-only registers, such as RMBx, SMBx.
PA
PB
PC
PCA
PCB
PCC
PMCR
PSG0L
PSG0H R/W
PSG1L
PSG1H R/W
DAC
PSGC
VOL
BTM
PRS
T0M
T0C
T1M
T1C
SYS
PRR
LSEL
LCTL
LCK
IREQ
IENA
Name
Register
$31
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W PSG0[7] PSG0[6] PSG0[5] PSG0[4] PSG0[3]
R/W PSG1[7] PSG1[6] PSG1[5] PSG1[4] PSG1[3]
R/W
R/W VOL1[3] VOL1[2] VOL1[1] VOL1[0]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
W
W
R
R/W
RW
PCC[7]
DAC[7]
DRV[3]
PCA[7]
PCB[7]
PRS[7]
T0C[7]
T1C[7]
LPWR
SRES
PB[7]
PC[7]
PULL
XSEL
PA[7]
Bit 7
-
-
-
-
-
-
-
-
-
-
-
FIGURE 8-2 ROM Bank Selection Registers ($31~$32)
PCA[6]
PCB[6]
PCC[6]
DAC[6]
PCK[2]
PCK[2]
PRS[6]
BLANK
DRV[2]
T0C[6]
T1C[6]
PDBN
Bit7
SENA
OSTP
PA[6]
PB[6]
PC[6]
Bit 6
-
-
-
-
-
-
-
-
-
-
PCC[5]
DAC[5]
PCA[5]
PCB[5]
PCK[1]
PCK[1]
PRS[5]
T0M[5]
DRV[1]
INTEG
T0C[5]
T1C[5]
SENT
XSTP
PB[5]
PC[5]
PA[5]
Bit 5
IRBT
IEBT
REV
Bit6
-
-
-
-
-
-
-
LSEL[4]
PCA[4]
PCB[4]
PCC[4]
DAC[4]
PCK[0]
PCK[0]
PRS[4]
DRV[0]
T0M[4]
T1M[4]
T0C[4]
T1C[4]
SCAN
TEST
10/54
PB[4]
PC[4]
PA[4]
IRPT
Bit 4
IEPT
Bit5
-
-
-
-
-
-
-
PSG0[11] PSG0[10] PSG0[9] PSG0[8] - - - - 0000
PSG1[11] PSG1[10] PSG1[9] PSG1[8] - - - - 0000
VOL0[3]
LSEL[3]
DMD[1]
BTM[3]
PCA[3]
PCB[3]
PCC[3]
DAC[3]
PRS[3]
T1M[3]
CTR[3]
T0C[3]
T1C[3]
WSKP
PRBS
PB[3]
PC[3]
PA[3]
Bit 3
IRT1
IET1
-
-
-
-
-
Bit4
-
PSG0[2] PSG0[1] PSG0[0] 0000 0000
PSG1[2] PSG1[1] PSG1[0] 0000 0000
VOL0[2]
LSEL[2]
DMD[0]
PCA[2]
PCB[2]
PCC[2]
DAC[2]
BTM[2]
PRS[2]
CTR[2]
T0M[2]
T1M[2]
LCK[2]
T0C[2]
T1C[2]
C1EN
PB[2]
PC[2]
PA[2]
WAIT
Bit 2
IRT0
IET0
-
-
-
Bit3
-
VOL0[1]
LSEL[1]
PCC[1]
DAC[1]
BTM[1]
PCA[1]
PCB[1]
PRS[1]
T0M[1]
T1M[1]
CTR[1]
T0C[1]
T1C[1]
LCK[1]
IRDAC
IEDAC
C0EN
PB[1]
PC[1]
PA[1]
Bit 1
INH
-
-
-
-
Bit2
-
DACE=0 -000 0000
DACE=1 -000 0000
VOL0[0] 0000 0000
LSEL[0]
PCA[0]
PCB[0]
PCC[0]
DAC[0]
BTM[0]
PRS[0]
LVDET
PRR[0]
CTR[0]
T0M[0]
T1M[0]
LCK[0]
T0C[0]
T1C[0]
PB[0]
PA[0]
PC[0]
Bit 0
IRX
IEX
-
-
Bit1
-
- - 00 0000
- - 00 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 00 -0
1000 0000
100 - - - - -
- - - - 0000
000 - - - - -
- - -0 0000
1111 1111
1111 1111
- - -1 1111
1111 1111
- -00 -000
- - - - - --0
1111 -000
Default
ST2032A
PRR0
Bit0
9/13/07

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