st20-gp6 STMicroelectronics, st20-gp6 Datasheet - Page 92

• Manufacturer Part Number: st20-gp6
• Description: Gps Processor
• Manufacturer: STMicroelectronics

ST20-GP6
ASCIntEnable register
The ASCIntEnable register enables a source of interrupt.
Interrupts will occur when a status bit in the ASCStatus register is 1, and the corresponding bit in
the ASCIntEnable register is 1.*
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ASCIntEnable
Bit
0
1
2
3
4
5
6
7
8
15:9
Bit field
RxBufFullIE
TxEmptyIE
TxHalfEmptyIE
ParityErrorIE
FrameErrorIE
OverrunErrorIE
TimeoutNotEmpty
IE
TimeoutIdleIE
RxHalfFullIE
ASC base address + #10
Function
Receiver buffer full interrupt enable
Transmitter empty interrupt enable
Transmitter buffer half empty interrupt enable
Parity error interrupt enable
Framing error interrupt enable
Overrun error interrupt enable
Timeout not empty interrupt enable
Timeout idle interrupt enable
Receiver buffer half full interrupt enable
RESERVED. Write 0, will read back 0.
Table 15.5 ASCIntEnable register format
Read/Write