st20-gp6 STMicroelectronics, st20-gp6 Datasheet - Page 72

• Manufacturer Part Number: st20-gp6
• Description: Gps Processor
• Manufacturer: STMicroelectronics

ST20-GP6
that an update of the registers is in progress. A new value must not be written to the RTC counters
until this status bit clears (up to two RTC clock cycles later).
WDTclear registers
The watchdog counter is cleared by writing to two registers (WDTclearA and WDTclearB regis-
ters). Each of these must have the correct values (0xA and 0x5, respectively) written to them in
either order to clear the counter.
WDTstatus register
The WDTstatus register can be read to determine if the device was reset by the notRST input or
by a watchdog time-out. This status bit is reset only by the notRST input to the chip.
72/123
RTCstatus
Bit
WDTclearA
Bit
WDTclearB
Bit
WDTstatus
Bit
0
1
3:0
3:0
0
Bit field
Bit field
Bit field
Bit field
RESERVED
Loading
WDTclearA
WDTclearB
WDTstatus
Function
Always returns 0.
Indicates whether an update of the registers is in progress.
0 = RTCweeks and RTCmilliseconds registers can be written;
1 = RTC update in progress. RTCweeks and RTCmilliseconds registers cannot be
written
Function
First WDT clear address. Write 0xA.
Function
Second WDT clear address. Write 0x5.
Function
Watchdog timer status flag.
0 = chip reset normally (by an external notRST)
1 = chip reset by watchdog timer
Table 12.5 WDTclearA register format
Table 12.6 WDTclearB register format
Table 12.7 WDTstatus register format
Table 12.4 RTCstatus register format
RTC/WDT base address + #08
RTC/WDT base address + #10
RTC/WDT base address + #14
RTC/WDT base address + #18
Write
Write
Read
Read