74AUP1G374GF,132 NXP Semiconductors, 74AUP1G374GF,132 Datasheet - Page 14

• Manufacturer Part Number: 74AUP1G374GF,132
• Description: IC F-F D-TYPE POS EDGE 6-XSON
• Manufacturer: NXP Semiconductors
• Series: 74AUPr
• Type: D-Typer

Specifications of 74AUP1G374GF,132

• Output Type: Tri-State Non Inverted
• Package / Case: 6-XSON, SOT891
• Function: Standard
• Number Of Elements: 1
• Number Of Bits Per Element: 1
• Frequency - Clock: 53MHz
• Delay Time - Propagation: 23.6ns
• Trigger Type: Positive Edge
• Current - Output High, Low: 4mA, 4mA
• Voltage - Supply: 0.8 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Number Of Circuits: 1
• Logic Family: AUP
• Logic Type: CMOS
• Polarity: Non-Inverting
• Input Type: Single-Ended
• Propagation Delay Time: 20.5 ns
• High Level Output Current: - 4 mA
• Low Level Output Current: 4 mA
• Supply Voltage (max): 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Supply Voltage (min): 0.8 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 74AUP1G374GF-H; 74AUP1G374GF-H; 935281333132

NXP Semiconductors
Table 10.
[1]
74AUP1G374
Product data sheet
Supply voltage
V
0.8 V to 3.6 V
Fig 8.
Fig 9.
CC
For measuring enable and disable times R
M.
Logic levels: V
Enable and disable times
Test data is given in
Definitions for test circuit:
R
C
R
V
Test circuit for measuring switching times
Measurement points are given in
L
L
T
EXT
Test data
= Load resistance.
= Load capacitance including jig and probe capacitance.
= Termination resistance should be equal to the output impedance Z
= External voltage for measuring switching times.
Load
C
5 pF, 10 pF, 15 pF and 30 pF 5 k or 1 M
OL
L
and V
HIGH-to-OFF
OFF-to-HIGH
Table
LOW-to-OFF
OFF-to-LOW
output
OH
OE input
output
10.
are typical output voltage levels that occur with the output load.
GND
GND
V
V
V
Table
OH
CC
OL
V
L
All information provided in this document is subject to legal disclaimers.
I
G
= 5 k, for measuring propagation delays, set-up and hold times and pulse width R
9.
V I
V
Rev. 5 — 14 July 2010
M
enabled
outputs
R
t
PLZ
t
L
PHZ
R T
[1]
Low-power D-type flip-flop; positive-edge trigger; 3-state
DUT
V
CC
V
X
V
Y
V O
disabled
outputs
V
t
open
PLH
C L
EXT
o
001aac521
of the pulse generator.
V
, t
EXT
PHL
t
5 kΩ
R L
PZL
t
PZH
V
M
V
M
outputs
enabled
mna644
t
GND
PZH
74AUP1G374
, t
PHZ
© NXP B.V. 2010. All rights reserved.
t
2  V
PZL
, t
CC
PLZ
14 of 23
L
= 1