74AHC574BQ,115 NXP Semiconductors, 74AHC574BQ,115 Datasheet - Page 11

IC OCT D FF POS-EDGTRIG 20DHVQFN

74AHC574BQ,115

Manufacturer Part Number
74AHC574BQ,115
Description
IC OCT D FF POS-EDGTRIG 20DHVQFN
Manufacturer
NXP Semiconductors
Series
74AHCr
Type
D-Type Busr
Datasheet

Specifications of 74AHC574BQ,115

Function
Standard
Output Type
Tri-State Non Inverted
Number Of Elements
1
Number Of Bits Per Element
8
Frequency - Clock
75MHz
Delay Time - Propagation
9ns
Trigger Type
Positive Edge
Current - Output High, Low
8mA, 8mA
Voltage - Supply
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
Number Of Circuits
8
Logic Family
74AHC
Logic Type
CMOS
Polarity
Non-Inverting
Input Type
Single-Ended
Propagation Delay Time
16.7 ns
High Level Output Current
- 8 mA
Supply Voltage (max)
5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Supply Voltage (min)
2 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74AHC574BQ-G
74AHC574BQ-G
935285546115

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74AHC574BQ,115
Manufacturer:
ROHM
Quantity:
12 000
Part Number:
74AHC574BQ,115
Manufacturer:
NXP
Quantity:
12 000
NXP Semiconductors
Table 8.
74AHC_AHCT574_2
Product data sheet
Type
74AHC574
74AHCT574
Fig 8.
Fig 9.
Measurement points are given in
V
The shaded areas indicate when the input is permitted to change for predicable output performance.
The data input (D) to clock input (CP) set-up times and clock input (CP) to data input (D) hold times
Measurement points are given in
V
Enable and disable times
OL
OL
Measurement points
and V
and V
OH
OH
are typical voltage output levels that occur with the output load.
are typical voltage output levels that occur with the output load.
HIGH-to-OFF
OFF-to-HIGH
LOW-to-OFF
OFF-to-LOW
Qn output
CP input
Dn input
Qn output
Qn output
OE input
Input
V
0.5V
1.5 V
M
GND
GND
GND
V
GND
V
V
V
V
Table
Table
OH
CC
OL
OH
OL
V
V
V
CC
I
I
I
8.
8.
Rev. 02 — 24 January 2008
V
M
enabled
outputs
V
t
M
PLZ
t
PHZ
V
t
M
su
Output
V
0.5V
0.5V
V
M
X
V
t
Octal D-type flip-flop; positive edge-trigger; 3-state
h
Y
CC
CC
74AHC574; 74AHCT574
V
disabled
outputs
M
t
PZL
t
PZH
t
V
V
V
su
X
OL
OL
V
M
t
+ 0.3 V
+ 0.3 V
h
V
001aah078
M
mna803
outputs
enabled
V
V
V
© NXP B.V. 2008. All rights reserved.
Y
OH
OH
0.3 V
0.3 V
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