rs5c62 RICOH Co.,Ltd., rs5c62 Datasheet - Page 37

• Manufacturer Part Number: rs5c62
• Description: Real-time Clock
• Manufacturer: RICOH Co.,Ltd.

11.4 Adjusting Second Digit by ±30 Seconds
11.5 Detecting Start of Oscillation
In using the XSTP bit, ensure error-free detection of the stop of oscillation by:
1) Preventing the crystal oscillators causing condensation.
2) Preventing the VDD pin input from making instantaneous power disconnection.
3) Preventing the crystal oscillators from causing noises on the PCB (by such means as signal line isolation).
4) Preventing the individual pins from being impressed with voltage exceeding the maximum rating.
Detect start of
oscillation
YES
Power-on from 0V
BANK
XSTP
ADJ
XSTP=0
*
NO
2
1
1
0
*
1
*
2
*
1
Wait
*
3
Notice
*
*
*
*
*
1) Upon setting the ADJ bit to “1” in the adjustment register, the second and
2)
1) This typical process of detecting the start of oscillation is applied at pow-
2)
3)
lower-order 1 to 8Hz dividers are reset conditional on restart. At this
time, when the INTR pin is held low for output of a cyclic interrupt with a
cycle of 1 second or 60 seconds in the pulse mode, the INTR pin is
turned off with the timing shown below:
122.1µs, during which the BSY bit is kept at “1” in the control register 2.
er-on from 0V.
Note that the start of oscillation normally requires a time period (oscilla-
tion start time) on the order of 0.1 to 2 seconds. Further, assign a time-
out period to exit from loop for checking the XSTP bit in the control regis-
ter 2.
Adjustment of the second digit by ±30 seconds requires a maximum of
At power-on from 0V, the XSTP bit is set to “1” in the control register 2.
INTR
Setting the ADJ
bit to “1”
L
Maximum of 200 µs
RP/RF/RS5C62
OFF
33