rs5c62 RICOH Co.,Ltd., rs5c62 Datasheet - Page 13

• Manufacturer Part Number: rs5c62
• Description: Real-time Clock
• Manufacturer: RICOH Co.,Ltd.

• Pulse mode
• Level mode
(I) Adjustment by ±30 seconds
(II) Correction by +1
(III) Normal 1-second carry
(IV) Counter resetting (setting of WTRST bit)
(The CT
(The CTFG bit is not intended for write
(The CT
(The CTFG bit is intended for setting to “0”
operation.)
only.)
*
*
4) The CTFG bit is set to “1” upon output of a cyclic interrupt from the INTR pin (while it is held low).
5) When the BSY bit is set to “1”, write operation must not be performed upon the time and calendar counters which are being updated. Normally, read
(when there is a 1-second carry in transition of the
WTEN bit from “0” to “1”)
(Resetting the 1 to 8Hz dividers)
(A cyclic interrupt may occur in the pulse mode and the level mode.)
operation must be performed from the counters upon setting the BSY bit to “0”. Reading from them without checking the BSY bit requires separate
software for preventing reading errors. The BSY bit is set to “1” in the four cases below:
3
3
bit is set to “0”.)
bit is set to “1”.)
ALFG
INTR
Alarm time match
Alarm time match
CTFG
CTFG
INTR
INTR
Setting the WTRST bit to “1”
Setting the WTEN bit to “1”
Setting the ALFG
Setting the ADJ bit to “1”
Interrupt
bit to “0”
Preset interrupt cycle
Completion of pulse for carry to second digit
91.6µs
Alarm time match
MAX.122.1µs
MAX.122.1µs
MAX.122.1µs
Interrupt
Completion of correction by +1
Completion of adjustment
Completion of reset
Setting the CTFG bit to “0”
30.5µs
RP/RF/RS5C62
9