rs5c62 RICOH Co.,Ltd., rs5c62 Datasheet - Page 15

• Manufacturer Part Number: rs5c62
• Description: Real-time Clock
• Manufacturer: RICOH Co.,Ltd.

2.5 Interrupt Cycle Selection Register (BANK1 at “0h”)
• Pulse mode
• Level mode
• Relationship between INTR pin output and
(The CT
(The CTFG bit is not intended for write operation.)
(The CT
(The CTFG bit is intended for setting to “0” only.)
upward second count
*
*
*
CT3
1) These bits are intended for only write operation and always read as “0”.
2) The CT
) The bits marked with “
CT
D3
*
*
*
*
*
*
*
*
0
1
0
3
3
3
bit is set to “0”.)
bit is set to “1”.)
3
to CT
CT
CT2
D2
*
*
0
0
0
0
0
1
1
1
1
2
0
bits are used to set interrupt cycles and output modes as shown in the table below:
*
” are set to “0” or “1”.
CT
D1
0
CT1
*
*
0
0
1
1
0
0
1
1
1
CT
D0
0
CT0
*
*
0
0
1
0
1
0
1
0
1
Interrupt cycle/output mode selection bits *
(For write operation)
(For read operation)
Pulse mode
Level mode
2048Hz
1024Hz
1/60Hz
“OFF”
128Hz
16Hz
“ON”
INTR
1Hz
INTR
INTR
(1) Pulse mode (when 1Hz or 1/60Hz is selected)
(2) Level mode (when 1Hz or 1/60Hz is selected)
CTFG
CTFG
INTR
INTR
Disable a cyclic interrupt.
Specify a cycle (T) of 0.488ms (1/2048Hz).
Specify a cycle (T) of 0.977ms (1/1024Hz).
Specify a cycle (T) of 7.813ms (1/128Hz).
Specify a cycle (T) of 62.5ms (1/16Hz).
Specify a cycle (T) of 1s (1/1Hz).
Specify a cycle (T) of 60s (1/1/60Hz).
Specify the fixed low level of the INTR pin output.
Specify a duty cycle of 50%. See below.
See below.
*
1
Interrupt
Upward second count
Upward second count
Preset interrupt cycle
Remarks
(Interrupt)
2
30.5µs
30.5µs
Setting the CTFG bit to “0”
Upward second count
Upward second count
RP/RF/RS5C62
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