ds265188-port-t1-e1-j1-transc Maxim Integrated Products, Inc., ds265188-port-t1-e1-j1-transc Datasheet - Page 8

• Manufacturer Part Number: ds265188-port-t1-e1-j1-transc
• Description: Ds26518 8-port T1/e1/j1 Transceiver
• Manufacturer: Maxim Integrated Products, Inc.

DS26518 8-Port T1/E1/J1 Transceiver
Table 10-1. Register Address Ranges (in Hex)....................................................................................................... 103
Table 10-2. Global Register List .............................................................................................................................. 104
Table 10-3. Framer Register List ............................................................................................................................. 105
Table 10-4. LIU Register List ................................................................................................................................... 112
Table 10-5. BERT Register List ............................................................................................................................... 113
Table 10-6. HDLC-256 Register List........................................................................................................................ 114
Table 10-7. Global Register Bit Map........................................................................................................................ 115
Table 10-8. Framer Register Bit Map ...................................................................................................................... 116
Table 10-9. LIU Register Bit Map ............................................................................................................................ 126
Table 10-10. BERT Register Bit Map ...................................................................................................................... 127
Table 10-11. HDLC-256 Register Bit Map............................................................................................................... 128
Table 10-12. Global Register Set ............................................................................................................................ 129
Table 10-13. Output Status Control ......................................................................................................................... 130
Table 10-14. Master Clock Input Selection.............................................................................................................. 133
Table 10-15. Backplane Reference Clock Select .................................................................................................... 134
Table 10-16. Device ID Codes in this Product Family ............................................................................................. 139
Table 10-17. LIU Register Set ................................................................................................................................. 241
Table 10-18. Transmit Load Impedance Selection.................................................................................................. 243
Table 10-19. Transmit Pulse Shape Selection ........................................................................................................ 243
Table 10-20. Receive Level Indication .................................................................................................................... 248
Table 10-21. Receive Impedance Selection............................................................................................................ 249
Table 10-22. Receiver Sensitivity Selection with Monitor Mode Disabled............................................................... 250
Table 10-23. Receiver Sensitivity Selection with Monitor Mode Enabled ............................................................... 250
Table 10-24. BERT Register Set ............................................................................................................................. 251
Table 10-25. BERT Pattern Select .......................................................................................................................... 253
Table 10-26. BERT Error Insertion Rate ................................................................................................................. 254
Table 10-27. BERT Repetitive Pattern Length Select ............................................................................................. 254
Table 10-28. Extended BERT Register Set............................................................................................................. 259
Table 10-29. Transmit-Side HDLC-256 Register Set .............................................................................................. 263
Table 10-30. Receive-Side HDLC-256 Register Set ............................................................................................... 268
Table 12-1. Recommended DC Operating Conditions ............................................................................................ 292
Table 12-2. Capacitance.......................................................................................................................................... 292
Table 12-3. Recommended DC Operating Conditions ............................................................................................ 292
Table 12-4. Thermal Characteristics........................................................................................................................ 293
Table 12-5. Transmitter Characteristics................................................................................................................... 293
Table 12-6. Receiver Characteristics....................................................................................................................... 293
Table 13-1. SPI Bus Mode Timing........................................................................................................................... 294
Table 13-2. AC Characteristics—Microprocessor Bus Timing ................................................................................ 296
Table 13-3. Receiver AC Characteristics ................................................................................................................ 299
Table 13-4. Transmit AC Characteristics................................................................................................................. 301
Table 13-5. JTAG Interface Timing.......................................................................................................................... 304
Table 14-1. Instruction Codes for IEEE 1149.1 Architecture................................................................................... 309
Table 14-2. ID Code Structure................................................................................................................................. 310
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