cy2212 Cypress Semiconductor Corporation., cy2212 Datasheet - Page 6

• Manufacturer Part Number: cy2212
• Description: Clock Generator Lite
• Manufacturer: Cypress Semiconductor Corporation.

Document #: 38-07466 Rev. *A
Dual-Channel Output Driver
Figure 4 shows the clock driver driving two high-impedance
channels. The purpose of the series resistors R
decouple the two channels, and prevent noise from one
channel from coupling onto the second channel. With Z
40 ohms and the series resistor set to R
channel becomes an effective 56-ohm channel. The two
channels in parallel can be treated as a single 28-ohm
channel, and all of the external component values listed in
Table 1 can be used.
Signal Waveforms
A physical signal that appears at the pins of the device is
deemed valid or invalid depending on its voltage and timing
relations with other signals. This section defines the voltage
and timing waveforms for the input and output pins of the
CY2212. The Device Characteristics tables list the specifica-
tions for the device parameters that are defined here.
Input and Output voltage waveforms are defined as shown in
Figure 5. Both rise and fall times are defined between the 20%
Figure 6 shows the definition of output crossing point. The
nominal crossing point between the complementary outputs is
defined to be at the 50% point of the DC voltage levels. There
are two crossing points defined, Vx+ at the rising edge of CLK
and Vx– at the falling edge of CLK. For some clock waveforms,
both Vx+ and Vx– might be below Vx, nom (for example, if t
is larger than t
crossing point voltage.
Figure 7 shows the definition of long-term duty cycle, which is
simply the waveform high-time divided by the cycle time
(defined at the crossing point). Long-term duty cycle is the
average over many (>10,000) cycles. Short-term duty cycle is
V(t)
CF
CLK
CLKB
). Vx is defined as the differential output
X
= 16 ohms, the
Figure 6. Crossing-point Voltage
Figure 5. Voltage Waveforms
t
X
CF
is to
CH
CR
=
and 80% points of the voltage swing, with the swing defined
as V
V
The device parameters defined according to Figure 5 are as
follows.
Table 2. Definition of Device Parameters
defined in the next section. DC is defined as the output clock
long-term duty cycle.
Jitter
This section defines the specifications that relate to timing
uncertainty (or jitter) of the input and output waveforms.
Figure 8 shows the definition of long-term jitter with respect to
the falling edge of the CLK signal. Long-term jitter is the
difference between the minimum and maximum cycle times.
Equal requirements apply for rising edges of the CLK signal.
t
JL
Parameter
COS
V
t
CR
V
t
t
is defined as the output long-term jitter.
OH
CR
CR
V
IH
V
COS
H
CM
= V
, t
, V
, V
, C
CF
– V
OL
IL
F
OH
– V
L
Clock output high and low voltages
Clock output swing V
Common-mode voltage V
Vdd LVCMOS input high and low voltages
Clock output rise and fall times
Clock output rise/fall time delta t
t
CR
. For example, the output voltage swing
OL
– t
.
CF
Definition
Vx+
Vx,nom
Vx–
COS
80%
20%
= V
CM
= (V
OH
V
V
OH
OL
CR,CF
– V
CY2212
OH
Page 6 of 10
OL
– V
=
OL
)/2
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