cy28325-3 Cypress Semiconductor Corporation., cy28325-3 Datasheet - Page 16

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cy28325-3

Manufacturer Part Number
cy28325-3
Description
Ftg For Via Pentium 4 Chipsets
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
Document #: 38-07590 Rev. *.*
Switching Waveforms
t
t
t
t
t
V
V
V
AC Electrical Specifications
All Outputs Rise/Fall Time
9
2
3
4
8
Duty Cycle Timing
Duty Cycle Timing
0.7V CPUT/C, CPU_CS
Notes:
Parameter
oh
ol
crossover
3. All parameters specified with loaded outputs.
4. Duty cycle is measured at 1.5V when V
5. Determined as a fraction of 2*(Trp-Trn)(TRP+Trn) where Trp is a rising edge and Trp is an intersectiong falling edge.
6. The 0.7V test load is R
7. Characterize with control register, data byte 9, bits 5 and 6 = 1.
REF
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
Output
S
=33.2ohm, R
OUTPUT
Cycle-Cycle Clock Jitter
Rise Time
Fall Time
CPU-CPU Skew
Cycle-Cycle Clock Jitter
Rise/Fall Matching
High-level Output Voltage in-
cluding overshoot
Low-level Output Voltage in-
cluding undershoot
Crossover Voltage
P
= 49.9ohm in test circuit.
DD
[3]
= 3.3V. When V
(continued)
Description
t
2
(Single-ended Output)
DD
(CPU Differential Output)
= 2.5V, duty cycle is measure at 1.25V.
t
1A
t
1A
t
Measured at 1.5V t
Measured single ended waveform from
0.175V to 0.525V
Measured single ended waveform from
0.525V to 0.175V
Measured at Crossover
Measured at Crossover t
With all outputs running
Measured with test loads
Measured with test loads
Measured with test loads
Measured with test loads
1B
t
1B
t
3
Test Conditions
9 =
t
9A
8 =
[5, 6]
[6]
[6]
[6]
– t
t
9B
8A
– t
V
0V
8B
DD
0.175
0.175
–0.15
Min.
0.28
CY28325-3
Max.
1000
0.85
0.43
150
300
1.6
1.6
20
Page 16 of 19
Unit
ps
ns
ns
ps
ps
%
V
V
V
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