cy2dp3120 Cypress Semiconductor Corporation., cy2dp3120 Datasheet - Page 7
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cy2dp3120
Manufacturer Part Number
cy2dp3120
Description
1 20 Differential Clock/data Fanout Buffer
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
1.CY2DP3120.pdf
(9 pages)
Document #: 38-07514 Rev.*C
Ordering Information
CY2DP3120AI
CY2DP3120AIT
CY2DP3120AXI
CY2DP3120AXIT
Figure 8. Low-voltage Positive Emitter-coupled Logic (LVPECL) to a Low-voltage Differential Signaling (LVDS) Interface
Figure 9. Termination for LVPECL to HTSL interface for VCC=2.5V would use X=50 Ohms, Y=2300 Ohms, and Z=1000
Ohms. See application note titled, “PECL Translation, SAW Oscillators, and Specs” for other signalling standards and
Part Number
C Y 2 D P 3 1 2 0
52-pin TQFP
52-pin TQFP – Tape and Reel
52-pin TQFP - Lead Free
52-pin TQFP – Tape and Reel - Lead Free
V C C = 3 . 3 V
V E E = 0 V
One output is shown for clarity
X
VDD-2
Z
VCC
supplies.
Package Type
Y
Z o = 5 0 o h m
5 "
L V P E C L t o
5 "
L V D S
3 . 3 V
3 . 3 V
( 2 p la c e s )
1 2 0 o h m
3 3 o h m
1 2 0 o h m
Industrial, –40q to 85qC
Industrial, –40q to 85qC
FastEdge™ Series
Industrial, –40q to 85qC
Industrial, –40q to 85qC
( 2 p la c e s )
L V D S
5 1 o h m
Product Flow
CY2DP3120
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