cy2pp3220 Cypress Semiconductor Corporation., cy2pp3220 Datasheet
cy2pp3220
Available stocks
Related parts for cy2pp3220
cy2pp3220 Summary of contents
Page 1
... GHz. The device features two differential input paths that are differ- ential internally. The CY2PP3220 may function not only as a differential clock buffer but also as a signal-level translator and fanout on ECL/PECL signal to twenty ECL/PECL differential loads ...
Page 2
... QB(0:9) 13,11 30,28,25,23,21,19,17,15, QB#(0:9) 12,10 Governing Agencies The following agencies provide specifications that apply to the CY2PP3220. The agency name and relevant specification is listed below in Table 2. Table 1. Agency Name JEDEC Mil-Spec Notes the I/O column, the following notation is used: I for Input, O for Output, PD for Pull-Down, PU for Pull-Up, and PWR for Power 2 ...
Page 3
... Single-ended operation Single-ended operation [6] Relative – (number of differential outputs used =(V -V )/50; I =(V -V OHMIN OHMIN TT OHMAX OHMAX TT CC FastEdge™ Series CY2PP3220 Min. Max. –0.3 4.6 -4.6 0.3 –65 +150 150 2000 3 50 Min. Max. – |200| 100 –40 +85 [4] 22 [4] 60 250 – ...
Page 4
... MHz , See Figure 3 660 MHz 50% duty cycle Differential 20% to 80% VPP range 0.1V - 1.3V VCMR VEE + 1.2 Figure 1. PECL/ECL Input Waveform Definitions – PLH PHL FastEdge™ Series CY2PP3220 Min. Max. –2.625 –2.375 –3.465 –3.135 –1.25 –0.7 –1.995 – ...
Page 5
... PHL Figure 4. CY2PP3220 AC Test Reference FastEdge™ Series CY2PP3220 |), and output-to-output skew (t SK( " ...
Page 6
... Figure 6. Driving a PECL/ECL Single-ended Input " " FastEdge™ Series CY2PP3220 ...
Page 7
... Ordering Information Part Number CY2PP3220AI CY2PP3220AIT Document #: 38-07513 Rev.*C VDD-2 VCC One output is shown for clarity supplies. Package Type 52-pin TQFP 52-pin TQFP – Tape and Reel FastEdge™ Series CY2PP3220 Product Flow Industrial, –40q to 85qC Industrial, –40q to 85qC Page ...
Page 8
... The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. FastEdge™ Series CY2PP3220 51-85131-** Page ...
Page 9
... Document History Page Document Title: CY2PP3220 FastEdge™ Series Dual 1:10 Differential Clock/Data Fanout Buffer Document Number: 38-07513 REV. ECN NO. Issue Date ** 122437 02/13/03 *A 125459 04/16/03 *B 229372 See ECN *C 247613 See ECN Document #: 38-07513 Rev.*C Orig. of Change RGL New Data Sheet RGL Interchanged Pin 30 and 31 from QB0 /QB0# to QB0#/QB0 Changed the title to FastEdge™ ...