MBM29SL800BD Fujitsu Media Devices, MBM29SL800BD Datasheet - Page 19

• Manufacturer Part Number: MBM29SL800BD
• Description: (MBM29SL800TD/BD) FLASH MEMORY CMOS 8 M (1 M X 8/512 K X 16) BIT
• Manufacturer: Fujitsu Media Devices

Write Operation Status
*1: Successive reads from the erasing or erase-suspend sector causes DQ
*2: Reading from non-erase suspend sector address will indicate logic “1” at the DQ
DQ
Data Polling
In Progress
Exceeded
Time Limits
Unlike conventional procedure, it is not necessary to force V
pin requires V
this condition, the operation is initiated by writing the set-up command (60h) into the command register. Then,
the sector addresses pins (A
sector to be protected (recommend to set V
command (60h) . A sector is typically protected in 250 s. To verify programming of the protection circuitry, the
sector addresses pins (A
command (40h) . Following the command write, a logical “1” at device output DQ
sector in the read operation. If the output data is logical “0”, please repeat to write extended sector protect
command (60h) again. To terminate the operation, it is necessary to set RESET pin to V
The MBM29SL800TD/BD devices feature Data Polling as a method to indicate to the host that the Embedded
Algorithms are in progress or completed. During the Embedded Program Algorithm an attempt to read the
devices will produce the complement of the data last written to DQ
Algorithm, an attempt to read the device will produce the true data last written to DQ
Erase Algorithm, an attempt to read the device will produce a “0” at the DQ
Embedded Erase Algorithm an attempt to read the device will produce a “1” at the DQ
for Data Polling (DQ
For chip erase and sector erase, the Data Polling is valid after the rising edge of the sixth WE pulse in the six
write pulse sequence. Data Polling must be performed at sector address within any of the sectors being erased
and not a protected sector. Otherwise, the status may not be valid. Once the Embedded Algorithm operation is
close to being completed, the MBM29SL800TD/BD data pins (DQ
enable (OE) is asserted low. This means that the devices are driving status information on DQ
of time and then that byte’s valid data at the next instant of time. Depending on when the system samples the
DQ
7
7
output, it may read the status or valid data. Even if the device has completed the Embedded Algorithm
Embedded Program Algorithm
Embedded Erase Algorithm
Erase
Suspended
Mode
Embedded Program Algorithm
Embedded Erase Algorithm
Erase
Suspended
Mode
ID
for sector protection in this mode. The extended sector protect requires V
MBM29SL800TD
7
) is shown in “(3) Data Polling Algorithm” in FLOW CHART.
Erase Suspend Read
Erase Suspend Read
Erase Suspend Program
Erase Suspend Program
Status
18
(Erase Suspended Sector)
(Non-Erase Suspended Sector)
(Non-Erase Suspended Sector)
(Non-Erase Suspended Sector)
, A
18
17
, A
, A
17
16
, A
, A
Hardware Sequence Flags Table
16
15
, A
, A
15
14
, A
, A
IL
for the other addresses pins) , and write extended sector protect
14
13
, A
and A
13
and A
-10/12
12
) and (A
ID
12
and control timing for control pins. The only RESET
) and (A
Data
DQ
DQ
DQ
DQ
DQ
/MBM29SL800BD
0
1
0
6
7
, A
7
) may change asynchronously while the output
. Upon completion of the Embedded Program
7
7
7
7
7
1
, A
6
, A
0
Toggle
Toggle
Toggle
Toggle
Toggle
Toggle
2
)
1
Data
DQ
, A
to toggle.
1
0
6
(0, 1, 0) should be set and write a
)
7
output. Upon completion of the
2
(0, 1, 0) should be set to the
bit.
0
Data
DQ
will produce for protected
0
0
0
0
1
1
1
7
. During the Embedded
5
7
ID
IH
output. The flowchart
.
on RESET pin. With
Data
DQ
0
1
0
0
0
1
0
7
at one instant
3
Toggle*
Toggle
-10/12
Data
DQ
N/A
N/A
1*
1
1
2
2
1
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