MBM29PL64LM SPANSION, MBM29PL64LM Datasheet - Page 31

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MBM29PL64LM

Manufacturer Part Number
MBM29PL64LM
Description
Flash Memory 64 M (8M X 8/4M X 16) BIT
Manufacturer
SPANSION
Datasheet

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MBM29PL64LM
DQ
Data Polling
DQ
Toggle Bit I
The devices feature Data Polling as a method to indicate to the host that the Embedded Algorithms are in
progress or completed. During the Embedded Program Algorithm, an attempt to read devices will produce
reverse data last written to DQ
device will produce true data last written to DQ
device will produce a “0” at the DQ
read device will produce a “1” at the DQ
Algorithm” in FLOW CHART.
For programming, the Data Polling is valid after the rising edge of fourth write pulse in the four write pulse
sequence.
For chip erase and sector erase, the Data Polling is valid after the rising edge of the sixth write pulse in the six
write pulse sequence. Data Polling must be performed at sector addresses of sectors being erased, not protected
sectors. Otherwise, the status may become invalid.
If a program address falls within a protected sector, Data polling on DQ7 is active for approximately 1 s, then
the device returns to read mode. After an erase command sequence is written, if all sectors selected for erasing
are protected, Data Polling on DQ
not all selected sectors are protected, the Embedded Erase algorithm erases the unprotected sectors, and
ignores the selected sectors that are protected.
Once the Embedded Algorithm operation is close to being completed, the device data pins (DQ
asynchronously while the output enable (OE) is asserted low. This means that the device is driving status
information on DQ
samples the DQ
Algorithm operation and DQ
on DQ
The Data Polling feature is active only during the Embedded Programming Algorithm, Embedded Erase Algo-
rithm, Erace Suspendmode or sector erase time-out.
See “Data Polling during Embedded Algorithm Operation Timing Diagram” in TIMING DIAGRAM for the Data
Polling timing specifications and diagram.
The device also feature the “Toggle Bit I” as a method to indicate to the host system that the Embedded Algorithms
are in progress or completed.
During an Embedded Program or Erase Algorithm cycle, successive attempts to read (CE or OE toggling) data
from the devices will result in DQ
Algorithm cycle is completed, DQ
During programming, the Toggle Bit I is valid after the rising edge of the fourth write pulse in the four write pulse
sequences. For chip erase and sector erase, the Toggle Bit I is valid after the rising edge of the sixth write pulse
in the six write pulse sequences. The Toggle Bit I is active during the sector time out.
In programm operation, if the sector being written to is protected, the Toggle bit will toggle for about 1 s and
then stop toggling with the data unchanged. In erase, the device will erase all the selected sectors except for
the protected ones. If all selected sectors are protected, the chip will toggle the Toggle bit for about 100 s and
then drop back into read mode, having data kept remained.
Either CE or OE toggling will cause the DQ
Algorithm Operations” in TIMING DIAGRAM for the Toggle Bit I timing specifications and diagram.
7
6
7
to DQ
0
will be read on the successive read attempts.
7
7
output, it may read the status or valid data. Even if the device completes the Embedded
at one instant of time, and then that byte’s valid data the next. Depending on when the system
7
has a valid data, the data outputs on DQ
7
. Upon completion of the Embedded Program Algorithm, an attempt to read the
90/10
6
7
6
will stop toggling and valid data will be read on the next successive attempts.
7
is active for approximately 100 s, then the device returns to read mode. If
toggling between one and zero. Once the Embedded Program or Erase
output. Upon completion of the Embedded Erase Algorithm, an attempt to
7
output. The flowchart for Data Polling (DQ
6
7
to toggle. See “Toggle Bit l Timing Diagramduring Embedded
. During the Embedded Erase Algorithm, an attempt to read the
6
to DQ
0
may still be invalid. The valid data
7
) is shown in “Data Polling
7
) may change

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