MBM29DL34TF Fujitsu Media Devices, MBM29DL34TF Datasheet - Page 28

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MBM29DL34TF

Manufacturer Part Number
MBM29DL34TF
Description
(MBM29DL34BF/TF) FLASH MEMORY CMOS 32 M (4 M X 8/2 M X 16) BIT
Manufacturer
Fujitsu Media Devices
Datasheet

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MBM29DL34TF/BF
1. Reset Command
2. Autoselect Command
3. Byte/Word Programming
COMMAND DEFINITIONS
Device operations are selected by writing specific address and data sequences into the command register.
Some commands are required Bank Address (BA) input. When command sequences are inputted to bank being
read, the commands have priority than reading. “MBM29DL34TF/BF Command Definitions Table” in
BUS OPERATION defines the valid register command sequences. Note that the Erase Suspend (B0h) and Erase
Resume (30h) commands are valid only while the Sector Erase operation is in progress. Also the Program
Suspend (B0h) and Program Resume (30h) commands are valid only while the Program operation is in progress.
Moreover both Reset commands are functionally equivalent, resetting the device to the read mode.
Please note that commands must be asserted to DQ
In order to return from Autoselect mode or Exceeded Timing Limits (DQ
is initiated by writing the Reset command sequence into the command register. The device remains enabled for
reads until the command register contents are altered.
The device will automatically be in the reset state after power-up. In this case, a command sequence is not
required to read data.
Flash memories are intended for use in applications where the local CPU alters memory contents. Therfore,
manufacture and device codes must be accessible while the devices reside in the target system. PROM pro-
grammers typically access the signature codes by raising A
onto the address lines is not generally desired system design practice.
The device contains an Autoselect command operation to supplement traditional PROM programming method-
ology. The operation is initiated by writing the Autoselect command sequence into the command register.
The Autoselect command sequence is initiated by writing two unlock cycles. This is followed by a third write
cycle that contains the bank address (BA) and the Autoselect command. Then the manufacture and device
codes can be read from the bank, and an actual data of memory cell can be read from the another bank.
Following the command write, in Word mode, a read cycle from address (BA) 00h returns the manufacturer’s
code (Fujitsu
Word mode. The addresses and codes differ from those of Byte mode. (Refer to “MBM29DL34TF/BF Sector
Group Protection Verify Autoselect Codes Tables” and “MBM29DL34TF/BF Extended Autoselect Code Tables”
in
All manufacturer and device codes will exhibit odd parity with DQ
or unprotection) will be informed by address (BA) 02h for 16 ( (BA) 04h for 8). Scanning the sector group
addresses (A
logic “1” at device output DQ
by verify sector group protection on the protected sector. (See “MBM29DL34TF/BF Sector Group Protection
Verify Autoselect Codes Tables” and “MBM29DL34TF/BF Extended Autoselect Code Tables” in
OPERATION.)
The manufacture and device codes can be allowed reading from selected bank. To read the manufacture and
device codes and sector protection status from non-selected bank, it is necessary to write Read/Reset command
sequence into the register and then Autoselect command should be written into the bank to be read.
If the software (program code) for Autoselect command is stored into the Flash memory, the device and manu-
facture codes should be read from the other bank where is not contain the software.
To terminate the operation, it is necessary to write the Reset command sequence into the register. To execute
the Autoselect command during the operation, Reset command must be written before the Autoselect command.
The devices are programmed on a byte-by-byte (or word-by-word) basis. Programming is a four bus cycle
operation. There are two “unlock” write cycles. These are followed by the program set-up command and data
DEVICE BUS OPERATION.)
20
, A
04h) . A read cycle at address (BA) 01h outputs device code. Notice that the above applies to
19
, A
18
, A
17
, A
0
for a protected sector group. The programming verification should be performed
16
, A
15
, A
70
14
, A
13
, and A
12
7
) while (A
to DQ
9
0
to a high voltage. However, applying high voltage
and DQ
7
6
defined as the parity bit. Sector state (protection
, A
3
, A
8
5
2
to DQ
, A
1) to Read mode, the Reset operation
1
, A
15
0
)
bits are ignored.
(0, 0, 0, 1, 0) will produce a
DEVICE BUS
DEVICE

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