S29GL512N SPANSION, S29GL512N Datasheet - Page 71

• Manufacturer Part Number: S29GL512N
• Description: Page Mode Flash Memory
• Manufacturer: SPANSION

S29GL-N_00_B3 October 13, 2006
DQ6: Toggle Bit I
Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress
or complete, or whether the device has entered the Erase Suspend mode. Toggle Bit I may
be read at any address, and is valid after the rising edge of the final WE# pulse in the com-
mand sequence (prior to the program or erase operation), and during the sector erase
time-out.
During an Embedded Program or Erase algorithm operation, successive read cycles to any ad-
dress cause DQ6 to toggle. The system may use either OE# or CE# to control the read cycles.
When the operation is complete, DQ6 stops toggling.
After an erase command sequence is written, if all sectors selected for erasing are protected,
DQ6 toggles for approximately 100 µs, then returns to reading array data. If not all selected
sectors are protected, the Embedded Erase algorithm erases the unprotected sectors, and ig-
nores the selected sectors that are protected.
The system can use DQ6 and DQ2 together to determine whether a sector is actively erasing
or is erase-suspended. When the device is actively erasing (that is, the Embedded Erase al-
gorithm is in progress), DQ6 toggles. When the device enters the Erase Suspend mode, DQ6
stops toggling. However, the system must also use DQ2 to determine which sectors are eras-
ing or erase-suspended. Alternatively, the system can use DQ7 (see the subsection on DQ7:
Data# Polling).
If a program address falls within a protected sector, DQ6 toggles for approximately 1 µs after
the program command sequence is written, then returns to reading array data.
DQ6 also toggles during the erase-suspend-program mode, and stops toggling once the Em-
bedded Program algorithm is complete.
Table 16 on page 72
the toggle bit algorithm.
19, on page 84
subsection on
DQ2: Toggle Bit
shows the differences between DQ2 and DQ6 in graphical form. See also the
D a t a
shows the outputs for Toggle Bit I on DQ6.
Figure 18, on page 84
S29GL-N MirrorBit™ Flash Family
II.
S h e e t
shows the toggle bit timing diagrams.
Figure 6, on page 70
Figure
shows
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