LTC3553 Linear Technology Corporation, LTC3553 Datasheet - Page 31

• Manufacturer Part Number: LTC3553
• Description: Micropower USB Power Manager
• Manufacturer: Linear Technology Corporation

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where V
the LDO regulated output voltage, and I
load current.
Thus the power dissipated by all regulators is:
It is not necessary to perform any worst-case power dis-
sipation scenarios because the LTC3553 will automatically
reduce the charge current to maintain the die temperature
at approximately 110°C. However, the approximate ambi-
ent temperature at which the thermal feedback begins to
protect the IC is:
Example: Consider the LTC3553 operating from a wall
adapter with 5V (V
Li-Ion battery at 3.3V (BAT). Also assume P
so the total power dissipation is:
The ambient temperature above which the LTC3553 will
begin to reduce the 400mA charge current, is approxi-
mately:
The LTC3553 can be used above 41.4°C, but the charge
current will be reduced below 400mA. The charge current at
a given ambient temperature can be approximated by:
Thus:
Consider the above example with an ambient tempera-
ture of 60°C. The charge current will be reduced to
approximately:
OPERATION
P
T
P
T
P
I
I
I
BAT
BAT
BAT
A
A
D
D(REGS)
D
= 110°C – P
= 110°C – 0.98W • 70°C/W = 41.4°C
= (110°C – T
= (5V – 3.3V) • 400mA + 0.3W = 0.98W
= [(110°C – 60°C) / 70°C/W – 0.3W] / (5V – 3.3V)
= [(110°C – T
= (0.71W – 0.3W) / 1.7V = 241mA
INLDO
= P
is the LDO input supply voltage, V
D(BUCK)
(V
D
A
BUS
BUS
) / θ
• θ
A
) providing 400mA (I
) / θ
– BAT)
JA
JA
+ P
= (V
JA
D(LDO)
– P
BUS
D(REGS)
– BAT) • I
]
LDO
BAT
D(REGS)
BAT
) to charge a
is the LDO
+ P
= 0.3W,
D(REGS)
LDO
is
Printed Circuit Board Layout
When laying out the printed circuit board, the following
list should be followed to ensure proper operation of the
LTC3553:
1. The Exposed Pad of the package (Pin 21) should con-
2. The traces connecting the regulator input supply pins
3. The switching power trace connecting the SW pin to
4. Connections between the buck regulator inductor and
5. Keep the feedback pin traces (BUCK_FB and LDO_FB)
6. Connections between the LTC3553 PowerPath pins
nect directly to a large ground plane to minimize thermal
and electrical impedance.
(BVIN and V
capacitors should be kept as short as possible. The
GND side of each capacitor should connect directly to
the ground plane of the part. This capacitor provides
the AC current to the internal power MOSFETs and their
drivers. It is important to minimize inductance from this
capacitor to the pin of the LTC3553. Connect BVIN to
V
impedance traces.
its inductor should be minimized to reduce radiated
EMI and parasitic coupling. Due to the large voltage
swing of the switching node, sensitive nodes such as
the feedback nodes should be kept far away or shielded
from the switching nodes or poor performance could
result.
its output capacitor should be kept as short as possible.
The GND side of the output capacitor should connect
directly to the thermal ground plane of the part.
as short as possible. Minimize any parasitic capacitance
between the feedback traces and any switching node
(i.e., SW and logic signals). If necessary, shield the
feedback nodes with a GND trace.
(V
pacitors should be kept as short as possible. The GND
side of these capacitors should connect directly to the
ground plane of the part.
OUT
BUS
and V
and V
INLDO
OUT
INLDO
) and their respective decoupling ca-
to its input supply through short low
) and their respective decoupling
LTC3553
31
3553f