LTC2424 Linear Technology, LTC2424 Datasheet - Page 9

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LTC2424

Manufacturer Part Number
LTC2424
Description
4-/8-Channel 20-Bit uPower No Latency ADCs
Manufacturer
Linear Technology
Datasheet

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APPLICATIONS
power-up, the multiplexer channel is disabled and should
be programmed once the device enters the sleep state.
The results of the first conversion following a POR are not
valid since a multiplexer channel was disabled.
Reference Voltage Range
The LTC2424/LTC2428 can accept a reference voltage
from 0V to V
by the thermal noise of the front-end circuits, and as such,
its value in microvolts is nearly constant with reference
voltage. A decrease in reference voltage will not signifi-
cantly improve the converter’s effective resolution. On the
other hand, a reduced reference voltage will improve the
overall converter INL performance. The recommended
range for the LTC2424/LTC2428 voltage reference is
100mV to V
Input Voltage Range
The converter is able to accommodate system level offset
and gain errors as well as system level overrange
situations due to its extended input range, see Figure 2.
The LTC2424/LTC2428 converts input signals within the
extended input range of – 0.125 • V
(V
For large values of V
range of – 0.3V to (V
ESD protection devices begin to turn on and the errors due
to the input leakage current increase rapidly.
Input signals applied to V
– 300mV and above V
current, a resistor of up to 5k may be added in series with
REF
= FS
V
CC
–1/8V
9/8V
1/2V
+ 0.3V
–0.3V
V
SET
Figure 2. LTC2424/LTC2428 Input Range
REF
REF
REF
REF
CC
CC
0
.
. The converter output noise is determined
– ZS
NORMAL
U
SET
CC
RANGE
INPUT
CC
REF
+ 0.3V). Beyond this range the input
).
by 300mV. In order to limit any fault
this range is limited to a voltage
INFORMATION
IN
U
EXTENDED
may extend below ground by
RANGE
INPUT
W
REF
ABSOLUTE
MAXIMUM
RANGE
INPUT
24248 F02
to 1.125 • V
U
REF
any channel input pin (CH0 to CH7) without affecting the
performance of the device. In the physical layout, it is im-
portant to maintain the parasitic capacitance of the connec-
tion between this series resistance and the channel input
pin as low as possible; therefore, the resistor should be
located as close as practical to the channel input pin. The
effect of the series resistance on the converter accuracy can
be evaluated from the curves presented in the Analog In-
put/Reference Current section. In addition, a series resis-
tor will introduce a temperature dependent offset error due
to the input leakage current. A 1nA input leakage current
will develop a 1ppm offset error on a 5k resistor if V
5V. This error has a very strong temperature dependency.
Output Data Format
The LTC2424/LTC2428 serial output data stream is 24 bits
long. The first 4 bits represent status information indicat-
ing the sign, input range and conversion state. The next 20
bits are the conversion result, MSB first.
The LTC2424/LTC2428 can be interchanged with the
LTC2404/LTC2408. The two devices are designed to allow
the user to incorporate either device in the same design as
long as ZS
While the LTC2424/LTC2428 output word lengths are 24
bits (as opposed to the 32-bit output of the LTC2404/
LTC2408), their output clock timing can be identical to the
LTC2404/LTC2408. As shown in Figure 3, the LTC2424/
LTC2408 data output is concluded on the falling edge of the
24th serial clock (SCK). In order to maintain drop-in com-
patibility with the LTC2404/LTC2408, it is possible to clock
the LTC2424/LTC2428 with an additional 8 serial clock
pulses. This results in 8 additional output bits which are
always logic HIGH.
Bit 23 (first output bit) is the end of conversion (EOC)
indicator. This bit is available at the SDO pin during the
conversion and sleep states whenever the CS pin is LOW.
This bit is HIGH during the conversion and goes LOW
when the conversion is complete.
Bit 22 (second output bit) is a dummy bit (DMY) and is
always LOW.
Bit 21 (third output bit) is the conversion result sign indi-
cator (SIG). If V
bit is LOW. The sign bit changes state during the zero code.
SET
of the LTC2424/LTC2428 is tied to ground.
IN
is >0, this bit is HIGH. If V
LTC2424/LTC2428
IN
is <0, this
REF
9
=

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