LTC2424 Linear Technology, LTC2424 Datasheet - Page 13

• Manufacturer Part Number: LTC2424
• Description: 4-/8-Channel 20-Bit uPower No Latency ADCs
• Manufacturer: Linear Technology

APPLICATIONS
Operation at Higher Data Output Rates
The LTC2424/LTC2428 typically operate with an internal
oscillator of 153.6kHz. This corresponds to a notch fre-
quency of 60Hz and an output rate of 7.5 samples/second.
The internal oscillator is enabled if the F
(logic HIGH for a 50Hz notch). It is possible to drive the F
pin with an external oscillator for higher data output rates.
As shown in Figure 6, an external clock of 2.048MHz
applied to the F
with a data output rate of 100 samples/second.
Figure 7 shows the total unadjusted error (Offset Error +
Full-Scale Error + INL + DNL) as a function of the output
10
11
12
13
14
1
2
3
4
5
6
7
8
9
GND
V
FS
ADCIN
ZS
GND
MUXOUT
V
CH0
CH1
CH2
CH3
NC
NC
CC
CC
Figure 6. Selectable 100 Sample/Second Turbo Mode
SET
SET
LTC2424
Figure 7. Total Error vs Output Rate (V
CSMUX
CSADC
128
GND
GND
SDO
GND
GND
GND
256
224
192
160
SCK
CLK
D
96
64
32
NC
NC
F
0
IN
O
0
V
28
27
26
25
24
23
22
21
20
19
18
17
16
15
O
REF
pin results in a notch frequency of 800Hz
= 5V
OUTPUT RATE (SAMPLES/SEC)
U
12
10
SWITCH
6
8
R9 1k
50
HCO4
INFORMATION
U
13
11
5
9
10 TVEN POT
100
0.1 F
C9
4
W
7
12 BITS
13 BITS
14 BITS
16 BITS
10k
5V
C8 5pF
O
24248 F07
3
HCO4
pin is logic LOW
REF
2
24248 F06
150
R6 47k
= 5V)
U
1
270pF
R8 1k
R7 5k
C7
10pF
C6
+
O
data rate with a 5V reference. The relationship between the
output data rate (ODR) and the frequency applied to the F
pin (F
For output data rates up to 50 samples/second, the total
unadjusted error (TUE) is better than 16 bits, and better
than 12 bits at 100 samples/second. As shown in Figure 8,
for output data rates of 100 samples/second, the TUE is
better than 15 bits for V
unaveraged total unadjusted error for the LTC2424 or
LTC2428 operating at 100 samples/second with V
2.5V. Figure 10 shows the same device operating with a 5V
reference and an output data rate of 7.5 samples/second.
O
Figure 8. Total Error vs V
) is:
ODR = F
–20
–40
–10
–15
–25
–30
–35
256
224
192
160
128
10
–5
96
64
32
0
5
0
Figure 9. Total Unadjusted Error at
100 Samples/Second (No Averaging)
1.0
0
OUTPUT RATE = 100sps
1.5
O
/20480
2.0
REFERENCE VOLTAGE (V)
INPUT VOLTAGE (V)
REF
LTC2424/LTC2428
2.5
below 2.5V. Figure 9 shows an
3.0
REF
3.5
(Output Rate = 100sps)
4.0
12 BITS
13 BITS
14 BITS
15 BITS
V
V
CC
REF
= 5V
4.5
= 2.5V
24248 F08
24248 F09
5.0
2.5
13
REF
O
=