LTC2401 Linear Technology, LTC2401 Datasheet - Page 7

• Manufacturer Part Number: LTC2401
• Description: 1-/2-Channel 24-Bit uPower No Latency ADC in MSOP-10
• Manufacturer: Linear Technology

APPLICATIO S I FOR ATIO
falling edge of SCK. The final data bit (Bit 0) is shifted out
on the falling edge of the 31st SCK and may be latched on
the rising edge of the 32nd SCK pulse. On the falling edge
of the 32nd SCK pulse, SDO goes HIGH indicating a new
conversion cycle has been initiated. This bit serves as EOC
(Bit 31) for the next conversion cycle. Table 2 summarizes
the output data format.
As long as the voltage on the V
the – 0.3V to (V
range, a conversion result is generated for any input value
from – 0.125 • V
greater than 1.125 • V
to the value corresponding to 1.125 • V
voltages below – 0.125 • V
clamped to the value corresponding to – 0.125 • V
Single Ended Half-Bridge Digitizer
with Reference and Ground Sensing
Sensors convert real world phenomena (temperature,
pressure, gas levels, etc.) into a voltage. Typically, this
voltage is generated by passing an excitation current
Table 2. LTC2401/LTC2402 Output Data Format
Input Voltage
V
9/8 • V
V
V
3/4V
3/4V
1/2V
1/2V
1/4V
1/4V
0
–1LSB
–1/8 • V
V
*The sub LSBs are valid conversion results beyond the 24-bit level that may be included in averaging or discarded without loss of resolution.
**The sign bit changes state during the 0 code.
+
IN
REF
REF
IN
/0
> 9/8 • V
< –1/8 • V
–
REF
REF
REF
REF
REF
REF
+ 1LSB
REF
REF
+ 1LSB
+ 1LSB
+ 1LSB
REF
REF
CC
REF
Bit 31
EOC
+ 0.3V) absolute maximum operating
0
0
0
0
0
0
0
0
0
0
0
0
0
0
U
REF
to 1.125 • V
, the conversion result is clamped
CH SELECT
CH0/CH1
CH0/CH1
CH0/CH1
CH0/CH1
CH0/CH1
CH0/CH1
CH0/CH1
CH0/CH1
CH0/CH1
CH0/CH1
CH0/CH1
CH0/CH1
CH0/CH1
CH0/CH1
U
Bit 30
REF
IN
, the conversion result is
pin is maintained within
REF
W
Bit 29
1/0**
SIG
. For input voltages
1
1
1
1
1
1
1
1
1
1
0
0
0
REF
Bit 28
EXR
1
1
1
0
0
0
0
0
0
0
0
1
1
1
. For input
U
REF
Bit 27
MSB
.
0
0
0
1
1
1
1
0
0
0
0
1
1
1
Bit 26
through the sensor. The wires connecting the sensor to the
ADC form parasitic resistors R
current also flows through parasitic resistors R
as shown in Figure 2. The voltage drop across these
parasitic resistors leads to systematic offset and full-scale
errors.
In order to eliminate the errors associated with these
parasitic resistors, the LTC2401/LTC2402 include a full-
scale set input (FS
(ZS
input full-scale sense input. Errors due to parasitic resis-
tance R
0
0
0
1
1
0
0
1
1
0
0
1
1
1
SET
). As shown in Figure 3, the FS
Bit 25
P1
0
0
0
1
0
1
0
1
0
1
0
1
1
1
Figure 2. Errors Due to Excitation Currents
in series with the half-bridge sensor are
I
EXCITATION
Bit 24
1
1
0
1
0
1
0
1
0
1
0
1
0
0
SET
LTC2401/LTC2402
Bit 23
R
R
) and a zero-scale set input
P1
P2
SENSOR
1
1
0
1
0
1
0
1
0
1
0
1
0
0
+
–
+
–
P1
V
V
FULL-SCALE ERROR
OFFSET ERROR
+
–
and R
…
...
...
...
...
...
...
...
...
...
...
...
...
...
...
SENSOR OUTPUT
SET
P2
pin acts as a zero
Bit 4
. The excitation
LSB
24012 F02
1
1
0
1
0
1
0
1
0
1
0
1
0
0
P1
SUB LSBs*
and R
Bit 3-0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
7
P2
,