LTC2401 Linear Technology, LTC2401 Datasheet - Page 5

• Manufacturer Part Number: LTC2401
• Description: 1-/2-Channel 24-Bit uPower No Latency ADC in MSOP-10
• Manufacturer: Linear Technology

PIN
V
(Pin 4) with a 10 F tantalum capacitor in parallel with
0.1 F ceramic capacitor as close to the part as possible.
FS
full-scale input value. When V
full scale (FFFFF
FS
CH0, CH1 (Pins 4, 3): Analog Input Channels. The input
voltage range is – 0.125 • V
V
absolute maximum rating of – 0.3V to V
sions are performed alternately between CH0
and CH1 for the LTC2402. Pin 4 is a No Connect (NC) on
the LTC2401.
ZS
zero-scale input value. When V
outputs zero scale (00000
GND (Pin 6): Ground. Shared pin for analog ground,
digital ground, reference ground and signal ground. Should
be connected directly to a ground plane through a mini-
mum length trace or it should be the single-point-ground
in a single-point grounding system.
CS (Pin 7): Active LOW Digital Input. A LOW on this pin
enables the SDO digital output and wakes up the ADC.
Following each conversion, the ADC automatically enters
the Sleep mode and remains in this low power state as
long as CS is HIGH. A LOW on CS wakes up the ADC. A
LOW-to-HIGH transition on this pin disables the SDO
digital output. A LOW-to-HIGH transition on CS during the
Data Output transfer aborts the data transfer and starts a
new conversion.
CC
REF
SET
SET
SET
U
(Pin 1): Positive Supply Voltage. Bypass to GND
> 2.5V, the input voltage range may be limited by the
– ZS
(Pin 5): Zero-Scale Set Input. This pin defines the
(Pin 2): Full-Scale Set Input. This pin defines the
FUNCTIONS
U
SET
.
H
). The total reference voltage is
U
H
).
IN
REF
= FS
IN
to 1.125 • V
SET
= ZS
CC
, the ADC outputs
+ 0.3V. Conver-
SET
, the ADC
REF
. For
SDO (Pin 8): Three-State Digital Output. During the data
output period, this pin is used for serial data output. When
the chip select CS is HIGH (CS = V
high impedance state. During the Conversion and Sleep
periods, this pin can be used as a conversion status out-
put. The conversion status can be observed by pulling CS
LOW.
SCK (Pin 9): Bidirectional Digital Clock Pin. In the Internal
Serial Clock Operation mode, SCK is used as digital output
for the internal serial interface clock during the data output
period. In the External Serial Clock Operation mode, SCK
is used as digital input for the external serial interface. An
internal pull-up current source is automatically activated
in Internal Serial Clock Operation mode. The Serial Clock
mode is determined by the level applied to SCK at power
up and the falling edge of CS.
F
controls the ADC’s notch frequencies and conversion
time. When the F
converter uses its internal oscillator and the digital filter’s
first null is located at 50Hz. When the F
to GND (F
and the digital filter’s first null is located at 60Hz. When F
is driven by an external clock signal with a frequency f
the converter uses this signal as its clock and the digital
filter first null is located at a frequency f
O
(Pin 10): Frequency Control Pin. Digital input that
O
= 0V), the converter uses its internal oscillator
O
pin is connected to V
LTC2401/LTC2402
CC
), the SDO pin is in a
O
CC
EOSC
pin is connected
(F
O
/2560.
= V
CC
), the
EOSC
5
O
,