LTC1289 Linear Technology, LTC1289 Datasheet - Page 9

• Manufacturer Part Number: LTC1289
• Description: 3 Volt Single Chip 12-Bit Data Acquisition System
• Manufacturer: Linear Technology

A
The LTC1289 is a data acquisition component which
contains the following functional blocks:
1. 12-bit successive approximation capacitive A/D
2. Analog multiplexer (MUX)
3. Sample and hold (S/H)
4. Synchronous, full duplex serial interface
5. Control and timing logic
DIGITAL CONSIDERATIONS
Serial Interface
The LTC1289 communicates with microprocessors and
other external circuitry via a synchronous, full duplex, four
wire serial interface (see Operating Sequence). The shift
clock (SCLK) synchronizes the data transfer with each bit
being transmitted on the falling SCLK edge and captured
on the rising SCLK edge in both transmitting and receiving
systems. The data is transmitted and received simulta-
neously (full duplex).
Data transfer is initiated by a falling chip select (CS) signal.
After the falling CS is recognized, an 8-bit input word is
shifted into the D
the next conversion. Simultaneously, the result of the
D OUT
SCLK
PPLICATI
converter
D IN
CS
1
2
IN
O
SHIFT CONFIGURATION
input which configures the LTC1289 for
3
U
WORD IN
(Example: Differential Inputs (CH3-CH2), Bipolar, MSB-First and 12-Bit Word Length)
S
4
5
I FOR ATIO
U
6
7
8
W
t CYC
t SMPL
9
10
11
U
12
DON'T CARE
Operating Sequence
DON'T CARE
t CONV
D
D
previous conversion is output on the D
of the data exchange the requested conversion begins and
CS should be brought high. After t
complete and the results will be available on the next data
transfer cycle. As shown below, the result of a conversion is
delayed by one CS cycle from the input word requesting it.
Input Data Word
The LTC1289 8-bit data word is clocked into the D
on the first eight rising SCLK edges after chip select is
recognized. Further inputs on the D
until the next CS cycle. The eight bits of the input word are
defined as follows:
IN
OUT
SGL/
DIFF
D
D
IN
OUT
TRANSFER
WORD 1
DATA
WORD 0
B11 B10 B9
(SB)
ODD/
SIGN
MUX ADDRESS
SELECT
CONVERSION
1
t
CONV
NEW CONFIGURATION WORD IN
A/D
B8
SHIFT A/D RESULT OUT AND
SELECT
B7 B6
0
D
D
IN
OUT
TRANSFER
WORD 2
UNIPOLAR/
DATA
BIPOLAR
WORD 1
B5
UNI
B4
CONV
IN
MSB-FIRST/
LSB-FIRST
B3
CONVERSION
pin are then ignored
MSBF
OUT
, the conversion is
t
CONV
A/D
B2
LTC1289
line. At the end
B1
WL1
B0
D
D
LENGTH
WORD
IN
OUT
IN
WORD 3
LTC1289 AI03
WORD 2
LTC1289 AI01
input
LTC1289 AI02
WL0
9