AD9219BCPZRL-65 Analog Devices, Inc., AD9219BCPZRL-65 Datasheet - Page 6
AD9219BCPZRL-65
Manufacturer Part Number
AD9219BCPZRL-65
Description
Quad, 10-bit, 40/65 Msps Serial Lvds 1.8 V A/d Converter
Manufacturer
Analog Devices, Inc.
Datasheet
1.AD9219BCPZRL-65.pdf
(52 pages)
- Current page: 6 of 52
- Download datasheet (2Mb)
AD9219
SWITCHING SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, 2 V p-p differential input, 1.0 V internal reference, AIN = −0.5 dBFS, unless otherwise noted.
Table 4.
Parameter
CLOCK
OUTPUT PARAMETERS
APERTURE
1
2
3
See the
Can be adjusted via the SPI interface.
t
SAMPLE
Maximum Clock Rate
Minimum Clock Rate
Clock Pulse Width High (t
Clock Pulse Width Low (t
Propagation Delay (t
Rise Time (t
Fall Time (t
FCO Propagation Delay (t
DCO Propagation Delay (t
DCO to Data Delay (t
DCO to FCO Delay (t
Data to Data Skew
Wake-Up Time (Standby)
Wake-Up Time (Power Down)
Pipeline Latency
Aperture Delay (t
Aperture Uncertainty (Jitter)
Out-of-Range Recovery Time
(t
/20 is based on the number of bits divided by 2 because the delays are based on half duty cycles.
2
DATA-MAX
AN-835 Application
1
F
R
) (20% to 80%)
− t
) (20% to 80%)
DATA-MIN
A
)
2
FRAME
PD
DATA
)
)
EH
FCO
)
CPD
)
Note, “Understanding High Speed ADC Testing and Evaluation,” for a complete set of definitions and how these tests were completed.
EL
3
)
3
)
)
)
3
Temp
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
25°C
25°C
Full
25°C
25°C
25°C
Min
40
2.0
2.0
(t
(t
SAMPLE
SAMPLE
/20) − 300
/20) − 300
AD9219-40
Typ
12.5
12.5
2.5
300
300
2.5
t
(t
(t
(t
±50
600
375
10
500
<1
1
FCO
SAMPLE
SAMPLE
SAMPLE
+
Rev. 0 | Page 6 of 52
/20)
/20)
/20)
Max
10
3.5
3.5
(t
(t
±150
SAMPLE
SAMPLE
/20) + 300
/20) + 300
Min
65
2.0
2.0
(t
(t
SAMPLE
SAMPLE
/20) − 300
/20) − 300
AD9219-65
Typ
7.7
7.7
2.5
300
300
2.5
t
(t
(t
(t
±50
600
375
10
500
<1
2
FCO
SAMPLE
SAMPLE
SAMPLE
+
/20)
/20)
/20)
Max
10
3.5
3.5
(t
(t
±150
SAMPLE
SAMPLE
/20) + 300
/20) + 300
Unit
MSPS
MSPS
ns
ns
ns
ps
ps
ns
ns
ps
ps
ps
ns
μs
CLK
cycles
ps
ps rms
CLK
cycles
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